公开(公告)号：US11508624B2

公开(公告)日：2022-11-22

申请号：US16938401

申请日：2020-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jhe-Ching Lu ,  Bao-Ru Young ,  Yen-Sen Wang ,  Tsung-Chieh Tsai

IPC: H01L21/8238 ,  H01L27/092

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first semiconductor layer including a first semiconductor material in a first area of a substrate; alternately depositing second semiconductor layers and third semiconductor layers over the first semiconductor layer and over the substrate to form a semiconductor layer stack, wherein the second semiconductor layers include a second semiconductor material, the third semiconductor layers include the first semiconductor material, the second semiconductor material is different from the first semiconductor material, and a bottom surface of one of the second semiconductor layers contacts the first semiconductor layer in the first area and contacts the substrate in a second area of the substrate; planarizing a top surface of the semiconductor layer stack; and patterning the semiconductor layer stack to form a first semiconductor structure in the first area and a second semiconductor structure in the second area.

公开(公告)号：US11410952B2

公开(公告)日：2022-08-09

申请号：US16923574

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Jhe-Ching Lu ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer.

公开(公告)号：US11929288B2

公开(公告)日：2024-03-12

申请号：US17991153

申请日：2022-11-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jhe-Ching Lu ,  Bao-Ru Young ,  Yen-Sen Wang ,  Tsung-Chieh Tsai

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first semiconductor layer including a first semiconductor material in a first area of a substrate; alternately depositing second semiconductor layers and third semiconductor layers over the first semiconductor layer and over the substrate to form a semiconductor layer stack, wherein the second semiconductor layers include a second semiconductor material, the third semiconductor layers include the first semiconductor material, the second semiconductor material is different from the first semiconductor material, and a bottom surface of one of the second semiconductor layers contacts the first semiconductor layer in the first area and contacts the substrate in a second area of the substrate; planarizing a top surface of the semiconductor layer stack; and patterning the semiconductor layer stack to form a first semiconductor structure in the first area and a second semiconductor structure in the second area.

公开(公告)号：US20200335465A1

公开(公告)日：2020-10-22

申请号：US16923574

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiao-Tsung Yen ,  Jhe-Ching Lu ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Min-Chie Jeng

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer.

公开(公告)号：US20230078700A1

公开(公告)日：2023-03-16

申请号：US17991153

申请日：2022-11-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jhe-Ching Lu ,  Bao-Ru Young ,  Yen-Sen Wang ,  Tsung-Chieh Tsai

IPC: H01L21/8238 ,  H01L27/092

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first semiconductor layer including a first semiconductor material in a first area of a substrate; alternately depositing second semiconductor layers and third semiconductor layers over the first semiconductor layer and over the substrate to form a semiconductor layer stack, wherein the second semiconductor layers include a second semiconductor material, the third semiconductor layers include the first semiconductor material, the second semiconductor material is different from the first semiconductor material, and a bottom surface of one of the second semiconductor layers contacts the first semiconductor layer in the first area and contacts the substrate in a second area of the substrate; planarizing a top surface of the semiconductor layer stack; and patterning the semiconductor layer stack to form a first semiconductor structure in the first area and a second semiconductor structure in the second area.

公开(公告)号：US20240213099A1

公开(公告)日：2024-06-27

申请号：US18601074

申请日：2024-03-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jhe-Ching Lu ,  Yen-Sen Wang ,  Bao-Ru Young ,  Tsung-Chieh Tsai

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first semiconductor layer including a first semiconductor material in a first area of a substrate; alternately depositing second semiconductor layers and third semiconductor layers over the first semiconductor layer and over the substrate to form a semiconductor layer stack, wherein the second semiconductor layers include a second semiconductor material, the third semiconductor layers include the first semiconductor material, the second semiconductor material is different from the first semiconductor material, and a bottom surface of one of the second semiconductor layers contacts the first semiconductor layer in the first area and contacts the substrate in a second area of the substrate; planarizing a top surface of the semiconductor layer stack; and patterning the semiconductor layer stack to form a first semiconductor structure in the first area and a second semiconductor structure in the second area.

公开(公告)号：US20210098310A1

公开(公告)日：2021-04-01

申请号：US16938401

申请日：2020-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jhe-Ching Lu ,  Bao-Ru Young ,  Yen-Sen Wang ,  Tsung-Chieh Tsai

IPC: H01L21/8238 ,  H01L27/092

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first semiconductor layer including a first semiconductor material in a first area of a substrate; alternately depositing second semiconductor layers and third semiconductor layers over the first semiconductor layer and over the substrate to form a semiconductor layer stack, wherein the second semiconductor layers include a second semiconductor material, the third semiconductor layers include the first semiconductor material, the second semiconductor material is different from the first semiconductor material, and a bottom surface of one of the second semiconductor layers contacts the first semiconductor layer in the first area and contacts the substrate in a second area of the substrate; planarizing a top surface of the semiconductor layer stack; and patterning the semiconductor layer stack to form a first semiconductor structure in the first area and a second semiconductor structure in the second area.