公开(公告)号：US20170062343A1

公开(公告)日：2017-03-02

申请号：US14839934

申请日：2015-08-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Li-Yen FANG ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG ,  Yu-Ku LIN

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768 ,  H01L23/535

CPC classification number: H01L23/53238 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/535

Abstract: A semiconductor device includes a substrate, a dielectric structure, a barrier layer, a glue layer, a copper seed layer and a copper layer. The dielectric structure is disposed over the substrate. The dielectric structure has a through via hole passing through the dielectric structure, and a sidewall of the through via hole includes at least one indentation. The barrier layer conformally covers the sidewall and a bottom of the through via hole. The glue layer conformally covers the barrier layer. The copper seed layer conformally covers the glue layer. The copper layer covers the copper seed layer and fills the through via hole.

Abstract translation: 半导体器件包括衬底，电介质结构，势垒层，胶层，铜籽晶层和铜层。 电介质结构设置在衬底上。 电介质结构具有通过电介质结构的通孔，并且通孔的侧壁包括至少一个压痕。 阻挡层保形地覆盖通孔的侧壁和底部。 粘合层保形地覆盖阻挡层。 铜籽晶层保形地覆盖胶层。 铜层覆盖铜种子层并填充通孔。

公开(公告)号：US20220359607A1

公开(公告)日：2022-11-10

申请号：US17872276

申请日：2022-07-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chi-Ming LU ,  Chih-Hui HUANG ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG ,  Chih-Chang HUANG ,  Ching-Ho HSU

IPC: H01L27/146

Abstract: A method of forming a deep trench isolation in a radiation sensing substrate includes: forming a trench in the radiation sensing substrate; forming a corrosion resistive layer in the trench, in which the corrosion resistive layer includes titanium carbon nitride having a chemical formula of TiCxN(2-x), and x is in a range of 0.1 to 0.9; and filling a reflective material in the trench and over the corrosion resistive layer.

公开(公告)号：US20200083278A1

公开(公告)日：2020-03-12

申请号：US16680043

申请日：2019-11-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Ming LU ,  Chih-Hui HUANG ,  Sheng-Chan LI ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG

IPC: H01L27/146 ,  H01L21/3205 ,  H01L21/285 ,  H01L21/3213

Abstract: A method of fabricating a semiconductor device includes forming a first film having a first film stress type and a first film stress intensity over a substrate and forming a second film having a second film stress type and a second film stress intensity over the first film. The second film stress type is different than the first film stress type. The second film stress intensity is about same as the first film stress intensity. The second film compensates stress induced effect of non-flatness of the substrate by the first film.

公开(公告)号：US20180261547A1

公开(公告)日：2018-09-13

申请号：US15688936

申请日：2017-08-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chi-Ming LU ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG ,  Chih-Chang HUANG ,  Han-Chieh HUANG

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/53266 ,  H01L21/76802 ,  H01L21/76846 ,  H01L21/76856 ,  H01L23/5226

Abstract: A semiconductor device includes a substrate, a dielectric layer disposed on the substrate, and a conductive stack disposed within the dielectric layer. The conductive stack includes at least one first conductive layer, a second conductive layer disposed over the at least one first conductive layer, and a contact structure disposed between the at least one first conductive layer and the second conductive layer. The contact structure includes a contact via electrically connecting the at least one first conductive layer to the second conductive layer, and a glue layer conformal to sidewalls and a bottom surface of the contact via. The glue layer has isolated lattices and an amorphous region at which the isolated lattices are uniformly distributed.

公开(公告)号：US20170317134A1

公开(公告)日：2017-11-02

申请号：US15231390

申请日：2016-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Ming LU ,  Chih-Hui HUANG ,  Sheng-Chan LI ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG

IPC: H01L27/146 ,  H01L21/285 ,  H01L21/3205

Abstract: A method of fabricating a semiconductor device includes forming a first film having a first film stress type and a first film stress intensity over a substrate and forming a second film having a second film stress type and a second film stress intensity over the first film. The second film stress type is different than the first film stress type. The second film stress intensity is about same as the first film stress intensity. The second film compensates stress induced effect of non-flatness of the substrate by the first film.

公开(公告)号：US20240379727A1

公开(公告)日：2024-11-14

申请号：US18782156

申请日：2024-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Ming LU ,  Yao-Hsiang LIANG ,  Sheng-Chan LI ,  Jung-Chih TSAO ,  Chih-Hui HUANG

IPC: H01L27/146 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/3213

Abstract: A method of fabricating a semiconductor device includes forming a first film having a first film stress type and a first film stress intensity over a substrate and forming a second film having a second film stress type and a second film stress intensity over the first film. The second film stress type is different than the first film stress type. The second film stress intensity is about same as the first film stress intensity. The second film compensates stress induced effect of non-flatness of the substrate by the first film.

公开(公告)号：US20220415959A1

公开(公告)日：2022-12-29

申请号：US17859834

申请日：2022-07-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Ming LU ,  Chih-Hui HUANG ,  Sheng-Chan LI ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG

IPC: H01L27/146 ,  H01L21/3213 ,  H01L21/285 ,  H01L21/3205

Abstract: A method of fabricating a semiconductor device includes forming a first film having a first film stress type and a first film stress intensity over a substrate and forming a second film having a second film stress type and a second film stress intensity over the first film. The second film stress type is different than the first film stress type. The second film stress intensity is about same as the first film stress intensity. The second film compensates stress induced effect of non-flatness of the substrate by the first film.

公开(公告)号：US20170287841A1

公开(公告)日：2017-10-05

申请号：US15628902

申请日：2017-06-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Li-Yen FANG ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG ,  Yu-Ku LIN

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/528 ,  H01L23/535

CPC classification number: H01L23/53238 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/535

Abstract: A semiconductor device includes a substrate, a dielectric structure, a barrier layer, a glue layer, a copper seed layer and a copper layer. The dielectric structure is disposed over the substrate. The dielectric structure has a through via hole passing through the dielectric structure, and a sidewall of the through via hole includes at least one indentation. The barrier layer conformally covers the sidewall and a bottom of the through via hole. The glue layer conformally covers the barrier layer. The copper seed layer conformally covers the glue layer. The copper layer covers the copper seed layer and fills the through via hole.

公开(公告)号：US20170154917A1

公开(公告)日：2017-06-01

申请号：US15048936

申请日：2016-02-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chi-Ming LU ,  Chih-Hui HUANG ,  Jung-Chih TSAO ,  Yao-Hsiang LIANG ,  Chih-Chang HUANG ,  Ching-Ho HSU

IPC: H01L27/146

CPC classification number: H01L27/14685 ,  H01L27/14629 ,  H01L27/1463

Abstract: A method of forming a deep trench isolation in a radiation sensing substrate includes: forming a trench in the radiation sensing substrate; forming a corrosion resistive layer in the trench, in which the corrosion resistive layer includes titanium carbon nitride having a chemical formula of TiCxN(2−x), and x is in a range of 0.1 to 0.9; and filling a reflective material in the trench and over the corrosion resistive layer.