公开(公告)号：US11682618B2

公开(公告)日：2023-06-20

申请号：US17212113

申请日：2021-03-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pokuan Ho ,  Chia-Tien Wu ,  Hsin-Ping Chen ,  Wei-Chen Chu

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/528

Abstract: The present disclosure relates to an integrated chip that includes a substrate, a first metal line, and a hybrid metal line. The first metal line includes a first metal material and is within a first interlayer dielectric (ILD) layer over the substrate. The hybrid metal line is also within the first ILD layer. The hybrid metal line includes a pair of first metal segments that comprise the first metal material. The hybrid metal line further includes a second metal segment that comprises a second metal material that is different from the first metal material. The second metal segment is laterally between the pair of first metal segments.

公开(公告)号：US20220310508A1

公开(公告)日：2022-09-29

申请号：US17212113

申请日：2021-03-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pokuan Ho ,  Chia-Tien Wu ,  Hsin-Ping Chen ,  Wei-Chen Chu

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768

Abstract: The present disclosure relates to an integrated chip that includes a substrate, a first metal line, and a hybrid metal line. The first metal line includes a first metal material and is within a first interlayer dielectric (ILD) layer over the substrate. The hybrid metal line is also within the first ILD layer. The hybrid metal line includes a pair of first metal segments that comprise the first metal material. The hybrid metal line further includes a second metal segment that comprises a second metal material that is different from the first metal material. The second metal segment is laterally between the pair of first metal segments.