公开(公告)号：US20230369502A1

公开(公告)日：2023-11-16

申请号：US17663165

申请日：2022-05-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shao-Yang Ma ,  Cheng-Yen Wen ,  Li-Li Su ,  Chil-Horng Li ,  Yee-Chia Yeo

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/78618 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/78696 ,  H01L21/02592 ,  H01L21/02667 ,  H01L21/02576 ,  H01L29/66742

Abstract: A semiconductor device including a seeding layer in the source/drain region and a method of forming is provided. The semiconductor device may include a plurality of nanostructures over a substrate, a gate wrapping around the plurality of nanostructures, a source/drain region adjacent the plurality of nanostructures, and inner spacers between the source/drain region and the gate stack. The source/drain region may include a polycrystalline seeding layer covering sidewalls of the plurality of nanostructures and sidewalls of the inner spacers, and a semiconductor layer over the seeding layer. The semiconductor layer may have a higher dopant concentration than the seeding layer.