公开(公告)号：US20240079315A1

公开(公告)日：2024-03-07

申请号：US17901442

申请日：2022-09-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Shin WANG ,  Yu-Hsiang Wang ,  Wei-Ting Chang ,  Fan-Yi Hsu

IPC: H01L23/522 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/532 ,  H01L29/40

CPC classification number: H01L23/5226 ,  H01L21/32134 ,  H01L21/76805 ,  H01L21/76877 ,  H01L23/53257 ,  H01L29/401

Abstract: Improved control of via anchor profiles in metals at a contact layer can be achieved by slowing down an anchor etching process and by introducing a passivation operation. By first passivating a metallic surface, etchants can be prevented from dispersing along grain boundaries, thereby distorting the shape of the via anchor. An iterative scheme that involves multiple cycles of alternating passivation and etching operations can control the formation of optimal via anchor profiles. When a desirable anchor shape is achieved, the anchor maintains structural integrity of the vias, thereby improving reliability of the interconnect structure.