公开(公告)号：US11670553B2

公开(公告)日：2023-06-06

申请号：US17397529

申请日：2021-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chandrashekhar Prakash Savant ,  Chia-Ming Tsai ,  Ming-Te Chen ,  Shih-Chi Lin ,  Zack Chong ,  Tien-Wei Yu

IPC: H01L21/8234 ,  H01L21/28 ,  H01L29/66 ,  H01L21/768 ,  H01L27/088 ,  H01L29/78 ,  H01L29/49 ,  H01L21/324

CPC classification number: H01L21/823437 ,  H01L21/28088 ,  H01L21/28158 ,  H01L21/324 ,  H01L21/76832 ,  H01L21/823431 ,  H01L21/823462 ,  H01L27/0886 ,  H01L29/4966 ,  H01L29/66795 ,  H01L29/785

Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.

公开(公告)号：US11088029B2

公开(公告)日：2021-08-10

申请号：US16376432

申请日：2019-04-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chandrashekhar Prakash Savant ,  Chia-Ming Tsai ,  Ming-Te Chen ,  Shih-Chi Lin ,  Zack Chong ,  Tien-Wei Yu

IPC: H01L21/8234 ,  H01L21/28 ,  H01L21/768 ,  H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L29/49 ,  H01L21/324

Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.

公开(公告)号：US20230268231A1

公开(公告)日：2023-08-24

申请号：US18309416

申请日：2023-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chandrashekhar Prakash SAVANT ,  Chia-Ming TSAI ,  Ming-Te Chen ,  Shih-Chi Lin ,  Zack Chong ,  Tien-Wei Yu

IPC: H01L21/8234 ,  H01L21/28 ,  H01L29/66 ,  H01L21/768 ,  H01L27/088 ,  H01L29/78 ,  H01L29/49 ,  H01L21/324

CPC classification number: H01L21/823437 ,  H01L21/823431 ,  H01L21/28088 ,  H01L21/28158 ,  H01L29/66795 ,  H01L21/76832 ,  H01L27/0886 ,  H01L29/785 ,  H01L29/4966 ,  H01L21/324 ,  H01L21/823462

Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.

公开(公告)号：US12300549B2

公开(公告)日：2025-05-13

申请号：US18309416

申请日：2023-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chandrashekhar Prakash Savant ,  Chia-Ming Tsai ,  Ming-Te Chen ,  Shih-Chi Lin ,  Zack Chong ,  Tien-Wei Yu

IPC: H01L21/8234 ,  H01L21/28 ,  H01L21/324 ,  H01L21/768 ,  H01L27/088 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.

公开(公告)号：US20210366778A1

公开(公告)日：2021-11-25

申请号：US17397529

申请日：2021-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chandrashekhar Prakash Savant ,  Chia-Ming Tsai ,  Ming-Te Chen ,  Shih-Chi Lin ,  Zack Chong ,  Tien-Wei Yu

IPC: H01L21/8234 ,  H01L21/28 ,  H01L29/66 ,  H01L21/768 ,  H01L27/088 ,  H01L29/78 ,  H01L29/49 ,  H01L21/324

Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.