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公开(公告)号:US20240386947A1
公开(公告)日:2024-11-21
申请号:US18786285
申请日:2024-07-26
Inventor: Chien-Chen Lin , Pei-Yuan Li , Hsiang-Yun Lin , Shang Lin Wu , Wei Min Chan
IPC: G11C11/418 , G11C11/412 , G11C11/419
Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.
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公开(公告)号:US12106800B2
公开(公告)日:2024-10-01
申请号:US17673025
申请日:2022-02-16
Inventor: Chien-Chen Lin , Pei-Yuan Li , Hsiang-Yun Lin , Shang Lin Wu , Wei Min Chan
IPC: G11C11/418 , G11C11/412 , G11C11/419
CPC classification number: G11C11/418 , G11C11/412 , G11C11/419
Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.
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