公开(公告)号：US20240386947A1

公开(公告)日：2024-11-21

申请号：US18786285

申请日：2024-07-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Chen Lin ,  Pei-Yuan Li ,  Hsiang-Yun Lin ,  Shang Lin Wu ,  Wei Min Chan

IPC: G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.

公开(公告)号：US20250046367A1

公开(公告)日：2025-02-06

申请号：US18582160

申请日：2024-02-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kao-Cheng Lin ,  Yen-Huei Chen ,  Wei Min Chan ,  Hidehiro Fujiwara ,  Wei-Cheng Wu ,  Pei-Yuan Li ,  Chien-Chen Lin ,  Shang Lin Wu

IPC: G11C11/419

Abstract: A memory circuit includes an array including a plurality of memory cells arranged across a plurality of columns and a plurality of voltage control circuits, each of the plurality of voltage control circuits operatively coupled to the memory cells of a corresponding one of the plurality of columns. Each of the plurality of voltage control circuits includes a first portion configured to provide a first voltage drop in coupling a supply voltage to the memory cells of the corresponding column and a second portion configured to provide a second voltage drop in coupling the supply voltage to the memory cells of the corresponding column. The first voltage drop is substantially smaller than the second voltage drop.

公开(公告)号：US12106800B2

公开(公告)日：2024-10-01

申请号：US17673025

申请日：2022-02-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Chen Lin ,  Pei-Yuan Li ,  Hsiang-Yun Lin ,  Shang Lin Wu ,  Wei Min Chan

IPC: G11C11/418 ,  G11C11/412 ,  G11C11/419

CPC classification number: G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.

公开(公告)号：US20230260570A1

公开(公告)日：2023-08-17

申请号：US17673025

申请日：2022-02-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Chen Lin ,  Pei-Yuan Li ,  Irene Lin ,  Shang Lin Wu ,  Wei Min Chan

IPC: G11C11/418 ,  G11C11/412

CPC classification number: G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.