INTEGRATED CIRCUIT DEVICE AND METHOD FOR ESD PROTECTION

    公开(公告)号:US20240387512A1

    公开(公告)日:2024-11-21

    申请号:US18789918

    申请日:2024-07-31

    Abstract: An IC device includes a first power terminal, an IO pad, a first ESD protection device coupled between the first power terminal and IO pad, a first trigger current source device coupled between the first power terminal and the IO pad, and a substrate over which the first ESD protection device and first trigger current source device are formed. The first ESD protection device includes a parasitic BJT having a collector and an emitter coupled between the IO pad and first power terminal, and a base coupled via a substrate resistance to a well tap coupled to the first power terminal. The first trigger current source device, in response to an ESD voltage on the IO pad, becomes conductive and causes discharge of the ESD voltage through the first ESD protection device to the first power terminal.

    INTEGRATED CIRCUIT DEVICE AND METHOD FOR ESD PROTECTION

    公开(公告)号:US20220310589A1

    公开(公告)日:2022-09-29

    申请号:US17214110

    申请日:2021-03-26

    Abstract: An IC device includes a first power terminal, an IO pad, a first ESD protection device coupled between the first power terminal and IO pad, a first trigger current source device coupled between the first power terminal and IO pad, and a semiconductor substrate over which the first ESD protection device and first trigger current source device are formed. The first ESD protection device includes a parasitic BJT having a collector and an emitter coupled between the IO pad and first power terminal, and a base coupled via a substrate resistance to a well tap coupled to the first power terminal. The first trigger current source device, in response to an ESD voltage on the IO pad, becomes conductive and causes discharge of the ESD voltage through the first ESD protection device to the first power terminal.

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