公开(公告)号：US20250069980A1

公开(公告)日：2025-02-27

申请号：US18946959

申请日：2024-11-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Ping-Kang Huang ,  Sao-Ling Chiu ,  Tsung-Yu Chen ,  Tsung-Shu Lin ,  Chien-Yuan Huang ,  Chen-Hsiang Lao

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H01L23/42 ,  H01L23/495 ,  H01L25/00 ,  H01L25/065

Abstract: A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.

公开(公告)号：US20240387307A1

公开(公告)日：2024-11-21

申请号：US18789496

申请日：2024-07-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Yu-Ling Tsai ,  Chien-Chia Chiu ,  Tsung-Yu Chen

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/12

Abstract: A semiconductor package includes a first component, a second component, and a stiffener rib. The first component is disposed on a substrate. The second component is disposed aside the first component and on the substrate. The stiffener rib is disposed between the first component and the second component. The lid is attached to the stiffener rib, the first component and the second component. The lid includes a recess portion on the stiffener rib. A first sidewall and a second sidewall of the recess portion laterally surround the stiffener rib. A first top space between a first top sidewall of the stiffener rib and the first sidewall of the recess portion is greater than a second top space between a second top sidewall of the stiffener rib and the second sidewall of the recess portion.

公开(公告)号：US20240234223A1

公开(公告)日：2024-07-11

申请号：US18433436

申请日：2024-02-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Shu Lin ,  Wensen Hung ,  Tsung-Yu Chen

IPC: H01L23/053 ,  H01L21/52 ,  H01L25/18

CPC classification number: H01L23/053 ,  H01L21/52 ,  H01L25/18

Abstract: A manufacturing method of a semiconductor package includes the following steps. A package structure is provided over a substrate. A thermal interface layer is provided over the package structure. A lid structure is provided over the substrate, wherein the lid structure comprises a main body in contact with the package structure through the thermal interface layer and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.

公开(公告)号：US11929293B2

公开(公告)日：2024-03-12

申请号：US17406108

申请日：2021-08-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Shu Lin ,  Wensen Hung ,  Tsung-Yu Chen

IPC: H01L23/053 ,  H01L21/52 ,  H01L25/18

CPC classification number: H01L23/053 ,  H01L21/52 ,  H01L25/18

Abstract: A semiconductor package includes a substrate, a package structure, and a lid structure. The package structure is disposed on the substrate. The lid structure is disposed over substrate, wherein the lid structure includes a main body covering and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.

公开(公告)号：US20230326826A1

公开(公告)日：2023-10-12

申请号：US18334381

申请日：2023-06-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Ping-Kang Huang ,  Sao-Ling Chiu ,  Tsung-Yu Chen ,  Tsung-Shu Lin ,  Chien-Yuan Huang ,  Chen-Hsiang Lao

IPC: H01L23/367 ,  H01L21/48 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L25/0652 ,  H01L25/50 ,  H01L2225/06589 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L23/42

Abstract: A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.

公开(公告)号：US11721602B2

公开(公告)日：2023-08-08

申请号：US17314002

申请日：2021-05-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Yu-Ling Tsai ,  Chien-Chia Chiu ,  Tsung-Yu Chen

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/12

CPC classification number: H01L23/31 ,  H01L21/56 ,  H01L23/12

Abstract: A semiconductor package includes a chip package disposed on a substrate, a plurality of electronic components disposed aside the chip package on the substrate and a stiffener structure disposed on the substrate. The stiffener structure includes a stiffener ring surrounding the chip package and the plurality of electronic components, a stiffener rib between the chip package and the plurality of electronic components, wherein the stiffener rib includes a first portion and a second portion on the first portion, and a width of the second portion is greater than a width of the first portion. The semiconductor package further includes a lid attached to the stiffener structure, the chip package and the plurality of electronic components. A method of forming the semiconductor package is also provided.

公开(公告)号：US11715675B2

公开(公告)日：2023-08-01

申请号：US17688898

申请日：2022-03-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Ping-Kang Huang ,  Sao-Ling Chiu ,  Tsung-Yu Chen ,  Tsung-Shu Lin ,  Chien-Yuan Huang ,  Chen-Hsiang Lao

IPC: H01L23/367 ,  H01L21/48 ,  H01L25/065 ,  H01L25/00 ,  H01L23/42

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L25/0652 ,  H01L25/50 ,  H01L21/4871 ,  H01L23/42 ,  H01L25/0657 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/06589

Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a metallic cover. The semiconductor package is disposed on the circuit substrate. The metallic cover is disposed over the semiconductor package and over the circuit substrate. The metallic cover comprises a lid and outer flanges. The lid overlies the semiconductor package. The outer flanges are disposed at edges of the lid, are connected with the lid, extend from the lid towards the circuit substrate, and face side surfaces of the semiconductor package. The lid has a first region that is located over the semiconductor package and is thicker than a second region that is located outside a footprint of the semiconductor package.

公开(公告)号：US20220359322A1

公开(公告)日：2022-11-10

申请号：US17314002

申请日：2021-05-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Yu-Ling Tsai ,  Chien-Chia Chiu ,  Tsung-Yu Chen

IPC: H01L23/31 ,  H01L23/12 ,  H01L21/56

Abstract: A semiconductor package includes a chip package disposed on a substrate, a plurality of electronic components disposed aside the chip package on the substrate and a stiffener structure disposed on the substrate. The stiffener structure includes a stiffener ring surrounding the chip package and the plurality of electronic components, a stiffener rib between the chip package and the plurality of electronic components, wherein the stiffener rib includes a first portion and a second portion on the first portion, and a width of the second portion is greater than a width of the first portion. The semiconductor package further includes a lid attached to the stiffener structure, the chip package and the plurality of electronic components. A method of forming the semiconductor package is also provided.

公开(公告)号：US11018073B2

公开(公告)日：2021-05-25

申请号：US16594734

申请日：2019-10-07

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Shu Lin ,  Wensen Hung ,  Hung-Chi Li ,  Tsung-Yu Chen

IPC: H01L21/78 ,  H01L23/367 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

Abstract: In an embodiment, a device includes: a die stack over and electrically connected to an interposer, the die stack including a topmost integrated circuit die including: a substrate having a front side and a back side opposite the front side, the front side of the substrate including an active surface; a dummy through substrate via (TSV) extending from the back side of the substrate at least partially into the substrate, the dummy TSV electrically isolated from the active surface; a thermal interface material over the topmost integrated circuit die; and a dummy connector in the thermal interface material, the thermal interface material surrounding the dummy connector, the dummy connector electrically isolated from the active surface of the topmost integrated circuit die.

公开(公告)号：US20190385929A1

公开(公告)日：2019-12-19

申请号：US16290557

申请日：2019-03-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shih-Chang Ku ,  Hung-Chi Li ,  Tsung-Shu Lin ,  Tsung-Yu Chen ,  Wensen Hung

IPC: H01L23/427 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48

Abstract: A semiconductor device includes a vapor chamber lid for high power applications such as chip-on-wafer-on-substrate (CoWoS) applications using high performance processors (e.g., graphics processing unit (GPU)) and methods of manufacturing the same. The vapor chamber lid provides a thermal solution which enhances the thermal performance of a package with multiple chips. The vapor chamber lid improves hot spot dissipation in high performance chips, for example, at the three-dimensional (3D-IC) packaging level.