公开(公告)号：US20220336684A1

公开(公告)日：2022-10-20

申请号：US17853998

申请日：2022-06-30

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Chen-Hao HUANG ,  Hau-Yan LU ,  Sui-Ying HSU ,  YuehYing LEE ,  Chien-Ying WU ,  Chia-Ping LAI

IPC分类号： H01L31/0203 ,  H01L31/0352 ,  H01L31/18 ,  H01L31/105 ,  H01L31/103 ,  H01L31/0312

摘要： At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.

公开(公告)号：US20220155527A1

公开(公告)日：2022-05-19

申请号：US17097197

申请日：2020-11-13

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yueh Ying LEE ,  Chien-Ying WU ,  Sui-Ying HSU ,  Chen-Hao HUANG ,  Chien-Chang LEE ,  Chia-Ping LAI

IPC分类号： G02B6/34

摘要： An optical structure may be provided by forming a silicon grating structure over a dielectric material layer, depositing at least one dielectric material layer over the silicon grating structure, and depositing at least one dielectric etch stop layer over the at least one dielectric material layer. The at least one dielectric etch stop layer includes at least one dielectric material selected from silicon nitride and silicon oxynitride. A passivation dielectric layer may be formed over the at least one dielectric etch stop layer, and a patterned etch mask layer may be formed over the passivation dielectric layer. An opening may be formed through an unmasked portion of the passivation dielectric layer by performing an anisotropic etch process that etches the dielectric material selective to a silicon nitride or silicon oxynitride using the patterned etch mask layer as a masking structure. The at least one etch mask layer minimizes overetching.

公开(公告)号：US20220238730A1

公开(公告)日：2022-07-28

申请号：US17159359

申请日：2021-01-27

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Chen-Hao HUANG ,  Hau-Yan LU ,  Sui-Ying HSU ,  Yueh Ying LEE ,  Chien-Ying WU ,  Chia-Ping LAI

IPC分类号： H01L31/0203 ,  H01L31/0312 ,  H01L31/0352 ,  H01L31/103 ,  H01L31/105 ,  H01L31/18

摘要： At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.