公开(公告)号：US11967582B2

公开(公告)日：2024-04-23

申请号：US18138201

申请日：2023-04-24

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Chin-Hua Wang ,  Po-Chen Lai ,  Shu-Shen Yeh ,  Tsung-Yen Lee ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC分类号： H01L25/065 ,  H01L23/373 ,  H01L23/498 ,  H01L25/00

CPC分类号： H01L25/0655 ,  H01L23/3731 ,  H01L23/49822 ,  H01L25/50

摘要： A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.

公开(公告)号：US11637087B2

公开(公告)日：2023-04-25

申请号：US17458702

申请日：2021-08-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

发明人： Chin-Hua Wang ,  Po-Chen Lai ,  Shu-Shen Yeh ,  Tsung-Yen Lee ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC分类号： H01L23/49 ,  H01L25/065 ,  H01L25/00 ,  H01L23/498 ,  H01L23/373

摘要： A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.

公开(公告)号：US11282756B2

公开(公告)日：2022-03-22

申请号：US16994711

申请日：2020-08-17

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Tsung-Yen Lee ,  Chin-Hua Wang ,  Ming-Chih Yew ,  Chia-Kuei Hsu ,  Po-Chen Lai ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC分类号： H01L23/14 ,  H01L23/00 ,  H01L21/768 ,  H01L23/538 ,  H01L23/60

摘要： An organic interposer includes polymer matrix layers embedding redistribution interconnect structures, package-side bump structures, die-side bump structures and connected to a distal subset of the redistribution interconnect structures through a respective bump connection via structure. At least one metallic shield structure may laterally surround a respective one of the die-side bump structures. Shield support via structures may laterally surround a respective one of the bump connection via structures. Each metallic shield structure and the shield support via structures may be used to reduce mechanical stress applied to the redistribution interconnect structures during subsequent attachment of a semiconductor die to the die-side bump structures.