公开(公告)号：US20140001516A1

公开(公告)日：2014-01-02

申请号：US13614962

申请日：2012-09-13

申请人： Takashi ANDO ,  Martin M. FRANK ,  Vijay NARAYANAN

发明人： Takashi ANDO ,  Martin M. FRANK ,  Vijay NARAYANAN

IPC分类号： H01L29/778 ,  H01L21/338

CPC分类号： H01L21/823462 ,  H01L21/28255 ,  H01L21/28264 ,  H01L21/82345 ,  H01L29/1054 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66477 ,  H01L29/665 ,  H01L29/66522

摘要： A semiconductor structure includes a high mobility semiconductor, an interfacial oxide layer, a high dielectric constant (high-k) layer, a stack, a gate electrode, and a gate dielectric. The stack comprises a lower metal layer, a scavenging metal layer comprising a scavenging metal, and an upper metal layer formed on the scavenging metal layer. A Gibbs free energy change of a chemical reaction, in which an atom constituting the high mobility semiconductor layer that directly contacts the interfacial oxide layer combines with a metal oxide material comprising the scavenging metal and oxygen to form the scavenging metal in elemental form and oxide of the atom constituting the high mobility semiconductor layer that directly contacts the interfacial oxide layer, is positive.

摘要翻译： 半导体结构包括高迁移率半导体，界面氧化物层，高介电常数（高k）层，堆叠，栅极电极和栅极电介质。 堆叠包括下金属层，包含清除金属的清除金属层和形成在扫气金属层上的上金属层。 化学反应的吉布斯自由能变化，其中构成直接与界面氧化物层接触的高迁移率半导体层的原子与包含清除金属和氧的金属氧化物材料结合，以形成元素形式的清除金属和氧化物 构成与界面氧化物层直接接触的高迁移率半导体层的原子为正。

公开(公告)号：US20140004674A1

公开(公告)日：2014-01-02

申请号：US13536764

申请日：2012-06-28

申请人： Takashi ANDO ,  Martin M. FRANK ,  Vijay NARAYANAN

发明人： Takashi ANDO ,  Martin M. FRANK ,  Vijay NARAYANAN

IPC分类号： H01L21/336

CPC分类号： H01L21/823462 ,  H01L21/28255 ,  H01L21/28264 ,  H01L21/82345 ,  H01L29/1054 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66477 ,  H01L29/665 ,  H01L29/66522

摘要： A high mobility semiconductor layer is formed over a semiconductor substrate. An interfacial oxide layer is formed over the high mobility semiconductor layer. A high dielectric constant (high-k) dielectric layer is formed over the interfacial oxide layer. A stack is formed over the high-k dielectric layer. The stack comprises a lower metal layer, a scavenging metal layer comprising a scavenging metal, and an upper metal layer formed on the scavenging metal layer. A Gibbs free energy change of a chemical reaction, in which an atom constituting the high mobility semiconductor layer that directly contacts the interfacial oxide layer combines with a metal oxide material comprising the scavenging metal and oxygen to form the scavenging metal in elemental form and oxide of the atom constituting the high mobility semiconductor layer that directly contacts the interfacial oxide layer, is positive. A gate electrode and a gate dielectric are formed.

摘要翻译： 在半导体衬底上形成高迁移率半导体层。 在高迁移率半导体层上形成界面氧化物层。 在界面氧化物层上形成高介电常数（high-k）介电层。 堆叠形成在高k电介质层上。 堆叠包括下金属层，包含清除金属的清除金属层和形成在扫气金属层上的上金属层。 化学反应的吉布斯自由能变化，其中构成直接与界面氧化物层接触的高迁移率半导体层的原子与包含清除金属和氧的金属氧化物材料结合，以形成元素形式的清除金属和氧化物 构成与界面氧化物层直接接触的高迁移率半导体层的原子为正。 形成栅极电极和栅极电介质。

公开(公告)号：US20120299122A1

公开(公告)日：2012-11-29

申请号：US13571977

申请日：2012-08-10

申请人： Renee T. MO ,  Wesley C. NATZLE ,  Vijay NARAYANAN ,  Jeffrey W. SLEIGHT

发明人： Renee T. MO ,  Wesley C. NATZLE ,  Vijay NARAYANAN ,  Jeffrey W. SLEIGHT

IPC分类号： H01L29/78

CPC分类号： H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6659 ,  H01L29/7833

摘要： A transistor is provided that includes a silicon layer with a source region and a drain region, a gate stack disposed on the silicon layer between the source region and the drain region, an L shaped gate encapsulation layer disposed on sidewalls of the gate stack, and a spacer disposed above the horizontal portion of the gate encapsulation layer and adjacent to the vertical portion of the gate encapsulation layer. The gate stack has a first layer of high dielectric constant material, a second layer comprising a metal or metal alloy, and a third layer comprising silicon or polysilicon. The gate encapsulation layer has a vertical portion covering the sidewalls of the first, second, and third layers of the gate stack and a horizontal portion covering a portion of the silicon layer that is adjacent to the gate stack.

摘要翻译： 提供晶体管，其包括具有源极区和漏极区的硅层，设置在源极区和漏极区之间的硅层上的栅极堆叠，设置在栅极堆叠的侧壁上的L形栅极封装层，以及 设置在栅极封装层的水平部分上方并且与栅极封装层的垂直部分相邻的间隔物。 栅堆叠具有第一层高介电常数材料，第二层包括金属或金属合金，以及第三层包括硅或多晶硅。 栅极封装层具有覆盖栅极堆叠的第一，第二和第三层的侧壁的垂直部分和覆盖与栅极叠层相邻的硅层的一部分的水平部分。