公开(公告)号：US20070207557A1

公开(公告)日：2007-09-06

申请号：US11747344

申请日：2007-05-11

申请人： Takeru FUJINAGA ,  Kazuhiro HIROSE ,  Hideaki TAKEMORI ,  Toshiaki KOIZUMI

发明人： Takeru FUJINAGA ,  Kazuhiro HIROSE ,  Hideaki TAKEMORI ,  Toshiaki KOIZUMI

IPC分类号： H01L21/66

CPC分类号： H01L24/27 ,  B23K1/0016 ,  H01L23/488 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29298 ,  H01L2224/32014 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15787 ,  H05K3/3463 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

摘要： A chip mounting substrate for bonding a semiconductor chip to a substrate, comprises a solder layer on the substrate, the solder layer being connectable to a semiconductor chip, wherein the solder layer comprises a layer including δ-phase crystal grains of an Au—Sn alloy at a surface of the solder layer. The solder layer comprising a layer including δ-phase crystal grains of an Au—Sn alloy is formed at a surface of the solder layer. On mounting a semiconductor chip on the substrate, the substrate and the solder layer are heated and an image of the solder layer is shot to perform an image evaluation to detect the timing of mounting the semiconductor chip on the solder layer of the substrate and a position of the chip.

摘要翻译： 一种用于将半导体芯片接合到衬底的芯片安装衬底，包括在衬底上的焊料层，焊料层可连接到半导体芯片，其中焊料层包括包含Au-Sn合金的三相晶粒的层 在焊料层的表面。 包含含有Au-Sn合金的三相晶粒的层的焊料层形成在焊料层的表面。 在将半导体芯片安装在基板上时，基板和焊料层被加热，并且焊接层的图像被拍摄以进行图像评估，以检测将半导体芯片安装在基板的焊料层上的时机和位置 的芯片。