专利检索 cpc:"H01L2224/29099" 第 1 页

1.

发明授权
Packaging of a semiconductor device with a plurality of leads 有权

公开(公告)号：US12046541B2

公开(公告)日：2024-07-23

申请号：US18301807

申请日：2023-04-17

申请人： ROHM CO., LTD.

发明人： Katsuhiro Iwai

IPC分类号： H01L23/495 , H01L23/00 , H01L23/31

CPC分类号： H01L23/49548 , H01L23/3107 , H01L23/3121 , H01L23/3142 , H01L23/4952 , H01L23/49541 , H01L23/49551 , H01L23/49582 , H01L23/562 , H01L24/06 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/04026 , H01L2224/04042 , H01L2224/0603 , H01L2224/06181 , H01L2224/32245 , H01L2224/48247 , H01L2224/48465 , H01L2224/49111 , H01L2224/49113 , H01L2224/49431 , H01L2224/73265 , H01L2924/00014 , H01L2924/181 , H01L2924/18301 , H01L2924/3512 , H01L2924/181 , H01L2924/00012 , H01L2224/73265 , H01L2224/32245 , H01L2224/48247 , H01L2924/00012 , H01L2924/00014 , H01L2224/45099 , H01L2224/48465 , H01L2224/48247 , H01L2924/00012 , H01L2924/00014 , H01L2224/05599 , H01L2924/00014 , H01L2224/29099 , H01L2224/48465 , H01L2224/48247 , H01L2924/00

摘要： A semiconductor device includes a plurality of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin covering the semiconductor element and a part of each lead. The sealing resin includes a first edge, a second edge perpendicular to the first edge, and a center line parallel to the first edge. The reverse surfaces of the respective leads include parts exposed from the sealing resin, and the exposed parts include an outer reverse-surface mount portion and an inner reverse-surface mount portion that are disposed along the second edge of the sealing resin. The inner reverse-surface mount portion is closer to the center line of the sealing resin than is the outer reverse-surface mount portion. The outer reverse-surface mount portion is greater in area than the inner reverse-surface mount portion.

2.

发明授权
Semiconductor device with transmissive layer and manufacturing method thereof 有权

公开(公告)号：US11942581B2

公开(公告)日：2024-03-26

申请号：US17902035

申请日：2022-09-02

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： David Clark , Curtis Zwenger

IPC分类号： H01L33/58 , H01L21/56 , H01L21/683 , H01L23/00 , H01L33/44 , H01L33/62

CPC分类号： H01L33/58 , H01L21/563 , H01L21/6835 , H01L24/00 , H01L33/44 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/92 , H01L33/62 , H01L2221/68345 , H01L2224/13101 , H01L2224/16225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2224/81203 , H01L2224/81224 , H01L2224/81815 , H01L2224/92125 , H01L2924/00014 , H01L2924/15311 , H01L2924/18161 , H01L2924/3511 , H01L2224/73204 , H01L2224/32225 , H01L2224/16225 , H01L2924/00012 , H01L2224/81815 , H01L2924/00014 , H01L2224/81224 , H01L2924/00014 , H01L2224/13101 , H01L2924/014 , H01L2924/00014 , H01L2224/81203 , H01L2924/00014 , H01L2924/3511 , H01L2924/00012 , H01L2924/00014 , H01L2224/29099 , H01L2924/15311 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00012

摘要： A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

3.

发明申请
SEMICONDUCTOR PACKAGES AND RELATED METHODS 审中-公开

公开(公告)号：US20190244928A1

公开(公告)日：2019-08-08

申请号：US16387958

申请日：2019-04-18

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Phillip CELAYA , James P. LETTERMAN, JR. , Robert L. MARQUIS , Darrell TRUHITTE

IPC分类号： H01L23/00 , H01L23/495 , H01L21/56 , H01L21/78 , H01L21/48 , H01L21/02

CPC分类号： H01L24/97 , H01L21/02021 , H01L21/4821 , H01L21/4828 , H01L21/561 , H01L21/78 , H01L23/3107 , H01L23/4952 , H01L23/49541 , H01L23/49548 , H01L23/49582 , H01L24/05 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/0401 , H01L2224/05553 , H01L2224/05599 , H01L2224/16245 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/10161 , H01L2924/19107 , H01L2924/00012 , H01L2224/45099 , H01L2224/29099

摘要： Methods of forming a semiconductor package. Implementations include providing a leadframe, coupling a semiconductor die or an electronic component to the leadframe, and encapsulating at least a portion of the semiconductor die or the electronic component using a mold compound leaving two or more leads of the leadframe exposed. The method may also include coating the two or more leads of the leadframe with an electrically conductive layer. The method may include fully electrically and physically singulating one or more tie bars between two or more leads of the leadframe, a lead of the two or more leads and a leadframe flag, or any combination thereof. The method may also include singulating the leadframe to form one or more semiconductor packages.

4.

发明申请
SEMICONDUCTOR STRUCTURE AND ASSOCIATED METHOD FOR MANUFACTURING THE SAME 审中-公开

公开(公告)号：US20190237385A1

公开(公告)日：2019-08-01

申请号：US16380197

申请日：2019-04-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： CHIN-LIANG CHEN , CHI-YANG YU , KUAN-LIN HO , YU-MIN LIANG

IPC分类号： H01L23/373 , H01L21/683 , H01L21/56 , H01L23/00 , H01L21/78 , H01L23/31 , H01L23/36 , H01L21/48

CPC分类号： H01L23/3736 , H01L21/4846 , H01L21/561 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L21/78 , H01L23/147 , H01L23/3128 , H01L23/36 , H01L23/3731 , H01L23/49816 , H01L23/5383 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68327 , H01L2221/68359 , H01L2224/131 , H01L2224/13147 , H01L2224/16225 , H01L2224/16238 , H01L2224/29099 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/97 , H01L2924/18161 , H01L2924/3511 , H01L2924/00014 , H01L2924/0105 , H01L2224/81 , H01L2924/014 , H01L2924/00

摘要： A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.

5.

发明授权
Semiconductor devices comprising nickel- and copper-containing interconnects 有权

公开(公告)号：US10062608B2

公开(公告)日：2018-08-28

申请号：US15584226

申请日：2017-05-02

申请人： Micron Technology, Inc.

发明人： Salman Akram , James M. Wark , William Mark Hiatt

IPC分类号： H01L21/768 , C23C18/18 , C23C18/16 , H01L21/288 , C23C18/34 , C23C18/36

CPC分类号： H01L21/76879 , C23C18/1607 , C23C18/1637 , C23C18/1831 , C23C18/1834 , C23C18/34 , C23C18/36 , H01L21/288 , H01L21/76898 , H01L2924/00013 , Y10T428/12528 , Y10T428/24917 , H01L2224/29099

摘要： A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

6.

发明申请
PACKAGING SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开

公开(公告)号：US20180240748A1

公开(公告)日：2018-08-23

申请号：US15961973

申请日：2018-04-25

申请人： PHOENIX & CORPORATION

发明人： Chu-Chin Hu , Shih-Ping Hsu , Che-Wei Hsu , Chin-Ming Liu , Chih-Kuai Yang

IPC分类号： H01L23/498 , H01L21/48 , H01L21/683 , H05K1/02 , H05K1/18 , H05K1/11 , H01L23/00 , H01L23/31

CPC分类号： H01L23/49838 , H01L21/4853 , H01L21/486 , H01L21/6835 , H01L23/145 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L2221/68345 , H01L2221/68359 , H01L2224/13101 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2924/00014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01079 , H01L2924/0665 , H01L2924/07025 , H01L2924/15311 , H01L2924/15738 , H01L2924/15747 , H01L2924/15763 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H05K1/0284 , H05K1/0298 , H05K1/111 , H05K1/181 , H05K2201/0367 , H01L2224/16225 , H01L2924/00012 , H01L2924/014 , H01L2224/29099

摘要： A packaging substrate is provided, which includes: an insulating layer; a plurality of conductive bumps formed on the insulating layer, wherein each of the conductive bumps has a post body exposed from the insulating layer and a conductive pad embedded in the insulating layer, the post body being integrally formed with and less in width than the conductive pad; and a plurality of conductive posts disposed on the conductive pads and embedded in the insulating layer. As such, a semiconductor chip can be bonded to the packaging substrate through the conductive bumps. The present disclosure further provides a method for fabricating the packaging substrate.

7.

发明申请
SEMICONDUCTOR STRUCTURE AND ASSOCIATED METHOD FOR MANUFACTURING THE SAME 审中-公开

公开(公告)号：US20180226321A1

公开(公告)日：2018-08-09

申请号：US15943047

申请日：2018-04-02

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： CHIN-LIANG CHEN , CHI-YANG YU , KUAN-LIN HO , YU-MIN LIANG

IPC分类号： H01L23/373 , H01L21/56 , H01L21/78 , H01L23/00 , H01L21/683

CPC分类号： H01L23/3736 , H01L21/4846 , H01L21/561 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L21/78 , H01L23/3128 , H01L23/36 , H01L23/3731 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68327 , H01L2221/68359 , H01L2224/131 , H01L2224/13147 , H01L2224/16225 , H01L2224/16238 , H01L2224/29099 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/97 , H01L2924/18161 , H01L2924/3511 , H01L2924/00014 , H01L2924/0105 , H01L2224/81 , H01L2924/014 , H01L2924/00

摘要： A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.

8.

发明申请
SEMICONDUCTOR PACKAGE 审中-公开

公开(公告)号：US20180226320A1

公开(公告)日：2018-08-09

申请号：US15429024

申请日：2017-02-09

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Ian HU , Jia-Rung HO , Jin-Feng YANG , Chih-Pin HUNG , Ping-Feng YANG

IPC分类号： H01L23/373 , H01L23/367 , H01L23/31 , H01L23/04 , H01L23/00

CPC分类号： H01L24/48 , H01L23/04 , H01L23/3121 , H01L23/3135 , H01L23/3142 , H01L23/367 , H01L23/373 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/131 , H01L2224/13101 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/48228 , H01L2224/49175 , H01L2224/49431 , H01L2224/49433 , H01L2224/73204 , H01L2224/73265 , H01L2224/83493 , H01L2224/8592 , H01L2224/92125 , H01L2924/00014 , H01L2924/15321 , H01L2924/16195 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2924/014 , H01L2224/29099

摘要： A semiconductor package includes a substrate, a semiconductor chip and a heat dissipation structure. The semiconductor chip includes a first surface, a second surface opposite to the first surface, and at least one chip pad disposed adjacent to the first surface. The chip pad is electrically connected to the substrate. The heat dissipation structure is disposed adjacent to the second surface of the semiconductor chip and a portion of the substrate. An area of the heat dissipation structure is greater than an area of the semiconductor chip.

9.

发明授权
Semiconductor packages including chip enablement pads 有权

公开(公告)号：US10002851B2

公开(公告)日：2018-06-19

申请号：US15248435

申请日：2016-08-26

申请人： SK hynix Inc.

发明人： Ki Yong Lee , Sang Hwan Kim , Hyung Ju Choi

IPC分类号： H01L23/48 , H01L25/065 , H01L21/105 , H01L25/18 , H01L23/00

CPC分类号： H01L25/0657 , H01L21/105 , H01L23/49816 , H01L23/5383 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/065 , H01L25/0652 , H01L25/18 , H01L2224/04042 , H01L2224/05554 , H01L2224/0612 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/49109 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/0652 , H01L2225/06548 , H01L2225/06562 , H01L2924/00014 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/00012 , H01L2224/32225 , H01L2224/45099 , H01L2224/29099 , H01L2224/05599

摘要： A semiconductor package includes a package substrate and semiconductor chips stacked on the package substrate. The package substrate may include at least one first chip enablement finger, at least one second chip enablement finger, and a chip enablement pad selection finger. Each of the semiconductor chips includes a first chip enablement pad connected to the at least one first chip enablement finger, a second chip enablement pad connected to the at least one second chip enablement finger, and a chip enablement pad selection pad connected to the chip enablement pad selection finger. The first chip enablement pads of the semiconductor chips or the second chip enablement pads of the semiconductor chips are optionally activated by a signal applied to the chip enablement pad selection finger.