公开(公告)号：US20090179694A1

公开(公告)日：2009-07-16

申请号：US12334573

申请日：2008-12-15

申请人： Takuya ARIKI

发明人： Takuya ARIKI

IPC分类号： G05F1/10

CPC分类号： G11C16/30 ,  G11C8/08 ,  G11C16/14

摘要： Provided is a discharge circuit. The discharge circuit for discharging two positive and negative high voltages after an erase operation of a non-volatile memory includes: a negative high voltage side discharge unit flowing constant current from a supply voltage to a negative high voltage node of the non-volatile memory to discharge the negative high voltage node; and a positive high voltage side discharge unit flowing constant current from a positive high voltage node of the non-volatile memory to a ground voltage to discharge the positive high voltage node, the positive high voltage side discharge unit simultaneously operating with the negative high voltage side discharge unit, wherein values of the constant currents flowing from the positive and negative high voltage side discharge units are approximately equal.

摘要翻译： 提供放电电路。 在非易失性存储器的擦除操作之后用于放电两个正和负高电压的放电电路包括：将恒定电流从电源电压流向非易失性存储器的负高压节点的负高压侧放电单元， 放电负高压节点; 以及将恒定电流从非易失性存储器的正高压节点流向地电压的正高压侧放电单元，以使正高压节点放电，正高压侧放电单元与负高压侧同时工作 放电单元，其中从正极和负极高压侧放电单元流出的恒定电流的值近似相等。

公开(公告)号：US20090046518A1

公开(公告)日：2009-02-19

申请号：US12191537

申请日：2008-08-14

申请人： Yuichiro NAKAGAKI ,  Takuya ARIKI

发明人： Yuichiro NAKAGAKI ,  Takuya ARIKI

IPC分类号： G11C7/00

CPC分类号： G11C16/30 ,  G11C8/08

摘要： Provided are a write voltage generating circuit of a non-volatile memory cell and a write voltage generating method. The write voltage generating circuit includes a voltage generating unit providing a preliminary write voltage at a level below a defined target level, a voltage sensing unit receiving the preliminary write voltage and a reference signal, and in response to a comparison between the preliminary write voltage and the reference signal generating a start signal, and a switching unit generating and applying a write voltage derived from the preliminary write voltage at a writeable level to a non-volatile memory cell during the write operation in response to the start signal, wherein the writeable level is less than the target level.

摘要翻译： 提供了非易失性存储单元的写入电压产生电路和写入电压产生方法。 写入电压产生电路包括：电压产生单元，其提供低于定义的目标电平的初级写入电压;接收初步写入电压的电压感测单元和参考信号;以及响应于初步写入电压和 所述参考信号产生起始信号，以及切换单元，响应于所述起始信号，在所述写入操作期间，将写入电平的写入电压从写入电平产生并施加到非易失性存储器单元，其中所述可写入电平 小于目标水平。