Process for the production of confectionery products
    2.
    发明申请
    Process for the production of confectionery products 审中-公开
    生产糖果产品的过程

    公开(公告)号:US20070160708A1

    公开(公告)日:2007-07-12

    申请号:US10557821

    申请日:2004-05-28

    IPC分类号: A23G4/18

    摘要: A process for the continuous production of confectionery products comprising crystallised xylitol comprising: feeding xylitol in liquid form which is capable of crystallisation on cooling into a mixer together with xylitol seed crystals; mixing the xylitol in liquid form and the xylitol seed crystals to produce a seeded mass; and discharging the seeded mass from the mixer, wherein the mixer is maintained at a temperature of between 80° C. and 120° C., whereby build up of crystallised xylitol within the mixer is substantially prevented. The xylitol in liquid form may be molten xylitol or a solution of xylitol and may comprise xylitol alone or in high proportion in combination with other polyols.

    摘要翻译: 连续生产包含结晶的木糖醇的糖果产品的方法,包括:将木糖醇以液体形式进料,所述木糖醇能够与木糖醇晶种一起冷却至混合器中结晶; 将木糖醇与木糖醇晶体混合以产生接种的质量; 并从混合器中排出接种的物质,其中将混合器保持在80℃和120℃之间的温度,从而基本上防止在混合器内堆积结晶的木糖醇。 液体形式的木糖醇可以是熔融木糖醇或木糖醇溶液,并且可以单独或与其它多元醇组合高度比例地含有木糖醇。

    Synchronizing multiple system clocks
    3.
    发明授权
    Synchronizing multiple system clocks 有权
    同步多个系统时钟

    公开(公告)号:US08934505B2

    公开(公告)日:2015-01-13

    申请号:US13288498

    申请日:2011-11-03

    IPC分类号: H04J3/06

    摘要: Techniques are disclosed for synchronizing multiple clock sources of a system, and may include: determining time of a first clock at a first and second time instants; determining time of a second clock at a third time instant occurring between the first and second time instants, and a fourth time instant occurring after the second time instant; and determining a clock offset between the first and second clocks based on the determined times. The first and/or second clocks may be adjusted based on the clock offset to synchronize clock operation. This adjusting can be used, for instance, to synchronize operation of an audio and/or video component operating according to the first clock with an audio and/or video component operating according to the second clock. The techniques may further include determining if the clock offset is valid (e.g., based on detection of perturbing events or difference between a clock's times).

    摘要翻译: 公开了用于同步系统的多个时钟源的技术,并且可以包括:在第一和第二时刻确定第一时钟的时间; 确定在第一和第二时刻之间发生的第三时刻的第二时钟的时间,以及在第二时刻之后发生的第四时刻; 以及基于所确定的时间确定所述第一和第二时钟之间的时钟偏移。 可以基于时钟偏移来调整第一和/或第二时钟以同步时钟操作。 该调整可以用于例如将根据第一时钟操作的音频和/或视频组件的操作与根据第二时钟操作的音频和/或视频组件同步操作。 这些技术可以进一步包括确定时钟偏移是否有效(例如,基于扰动事件的检测或时钟的时间之间的差异)。

    Synchronizing multiple system clocks
    4.
    发明授权
    Synchronizing multiple system clocks 有权
    同步多个系统时钟

    公开(公告)号:US08059688B2

    公开(公告)日:2011-11-15

    申请号:US12724834

    申请日:2010-03-16

    IPC分类号: H04J3/06 G06F1/12

    摘要: Techniques are disclosed for synchronizing multiple clock sources of a system, and may include: determining time of a first clock at a first and second time instants; determining time of a second clock at a third time instant occurring between the first and second time instants, and a fourth time instant occurring after the second time instant; and determining a clock offset between the first and second clocks based on the determined times. The first and/or second clocks may be adjusted based on the clock offset to synchronize clock operation. This adjusting can be used, for instance, to synchronize operation of an audio and/or video component operating according to the first clock with an audio and/or video component operating according to the second clock. The techniques may further include determining if the clock offset is valid (e.g., based on detection of perturbing events or difference between a clock's times).

    摘要翻译: 公开了用于同步系统的多个时钟源的技术,并且可以包括:在第一和第二时刻确定第一时钟的时间; 确定在第一和第二时刻之间发生的第三时刻的第二时钟的时间,以及在第二时刻之后发生的第四时刻; 以及基于所确定的时间确定所述第一和第二时钟之间的时钟偏移。 可以基于时钟偏移来调整第一和/或第二时钟以同步时钟操作。 该调整可以用于例如将根据第一时钟操作的音频和/或视频组件的操作与根据第二时钟操作的音频和/或视频组件同步操作。 这些技术可以进一步包括确定时钟偏移是否有效(例如,基于扰动事件的检测或时钟的时间之间的差异)。

    Methods and apparatus for synchronizing networked audio devices
    5.
    发明授权
    Methods and apparatus for synchronizing networked audio devices 有权
    用于同步网络音频设备的方法和装置

    公开(公告)号:US07680154B2

    公开(公告)日:2010-03-16

    申请号:US11967301

    申请日:2007-12-31

    IPC分类号: H04J3/06

    摘要: A method includes determining a network counter value indicative of a network clock time of a system at a first time instant and a second time instant occurring later in time than the first time instant. The method further includes determining an audio counter value indicative of an audio clock time of the system at a third time instant occurring the first and second time instants and a fourth time instant occurring later in time than the second time instant. The method further includes determining an offset based upon the determined network counter values and the audio counter values. The method further includes adjusting the audio clock time based upon the determined offset to synchronize operation of at least one audio component operating according to the audio clock with at least one audio component operating according to the network clock. An associated system is also disclosed.

    摘要翻译: 一种方法包括在第一时刻确定指示系统的网络时钟时间的网络计数器值,以及比第一时刻晚于时间发生的第二时刻。 该方法还包括:确定在第三时刻发生指示系统的音频时钟时间的音频计数器值,发生第一时刻和第二时刻以及比第二时刻晚于时间发生的第四时刻。 该方法还包括基于所确定的网络计数器值和音频计数器值来确定偏移量。 该方法还包括基于所确定的偏移来调整音频时钟时间,以使根据音频时钟操作的至少一个音频分量与根据网络时钟操作的至少一个音频分量同步操作。 还公开了一种相关系统。

    Crosstalk suppressing connector
    6.
    发明授权
    Crosstalk suppressing connector 失效
    串扰抑制连接器

    公开(公告)号:US5547405A

    公开(公告)日:1996-08-20

    申请号:US311247

    申请日:1994-09-23

    摘要: An electrical connector is provided with at least two pairs of signal-carrying contacts, which provides a low cost, compact, and rugged construction for minimizing crosstalk. While two initial contacts (A, B, FIG. 2) of the two pairs (102, 104) lie adjacent to each other, so there is unwanted capacitive and inductive coupling between them, secondary contacts (C, D) of the two pairs do not lie adjacent to the initial contacts and therefore are not as closely coupled to the initial contacts. Each secondary contact is capacitively coupled to an initial contact of the other pair by a lateral extension (110, 122) formed in one of the contacts which overlies the other contact in a local region (120) of limited length. The capacitive coupling resulting from the lateral extensions substantially cancels crosstalk that otherwise would exist.

    摘要翻译: 电连接器设置有至少两对信号承载触点,其提供低成本,紧凑和坚固的结构以最小化串扰。 虽然两对(102,104)的两个初始触点(A,B,图2)彼此相邻,因此它们之间存在不需要的电容和电感耦合,两对的次级触点(C,D) 不要靠近初始触点,因此不会与初始触点紧密耦合。 每个次级触点通过在有限长度的局部区域(120)中的另一触点之一上形成的一个触点中的横向延伸部(110,122)电容耦合到另一对的初始触点。 由横向扩展产生的电容耦合基本上消除了否则将存在的串扰。

    SYNCHRONIZING MULTIPLE SYSTEM CLOCKS
    7.
    发明申请
    SYNCHRONIZING MULTIPLE SYSTEM CLOCKS 审中-公开
    同步多个系统时钟

    公开(公告)号:US20120170597A1

    公开(公告)日:2012-07-05

    申请号:US13288498

    申请日:2011-11-03

    IPC分类号: H04J3/06

    摘要: Techniques are disclosed for synchronizing multiple clock sources of a system, and may include: determining time of a first clock at a first and second time instants; determining time of a second clock at a third time instant occurring between the first and second time instants, and a fourth time instant occurring after the second time instant; and determining a clock offset between the first and second clocks based on the determined times. The first and/or second clocks may be adjusted based on the clock offset to synchronize clock operation. This adjusting can be used, for instance, to synchronize operation of an audio and/or video component operating according to the first clock with an audio and/or video component operating according to the second clock. The techniques may further include determining if the clock offset is valid (e.g., based on detection of perturbing events or difference between a clock's times).

    摘要翻译: 公开了用于同步系统的多个时钟源的技术,并且可以包括:在第一和第二时刻确定第一时钟的时间; 确定在第一和第二时刻之间发生的第三时刻的第二时钟的时间,以及在第二时刻之后发生的第四时刻; 以及基于所确定的时间确定所述第一和第二时钟之间的时钟偏移。 可以基于时钟偏移来调整第一和/或第二时钟以同步时钟操作。 该调整可以用于例如将根据第一时钟操作的音频和/或视频组件的操作与根据第二时钟操作的音频和/或视频组件同步操作。 这些技术可以进一步包括确定时钟偏移是否有效(例如,基于扰动事件的检测或时钟的时间之间的差异)。

    SYNCHRONIZING MULTIPLE SYSTEM CLOCKS
    8.
    发明申请
    SYNCHRONIZING MULTIPLE SYSTEM CLOCKS 有权
    同步多个系统时钟

    公开(公告)号:US20100174830A1

    公开(公告)日:2010-07-08

    申请号:US12724834

    申请日:2010-03-16

    IPC分类号: G06F1/12

    摘要: Techniques are disclosed for synchronizing multiple clock sources of a system, and may include: determining time of a first clock at a first and second time instants; determining time of a second clock at a third time instant occurring between the first and second time instants, and a fourth time instant occurring after the second time instant; and determining a clock offset between the first and second clocks based on the determined times. The first and/or second clocks may be adjusted based on the clock offset to synchronize clock operation. This adjusting can be used, for instance, to synchronize operation of an audio and/or video component operating according to the first clock with an audio and/or video component operating according to the second clock. The techniques may further include determining if the clock offset is valid (e.g., based on detection of perturbing events or difference between a clock's times).

    摘要翻译: 公开了用于同步系统的多个时钟源的技术,并且可以包括:在第一和第二时刻确定第一时钟的时间; 确定在第一和第二时刻之间发生的第三时刻的第二时钟的时间,以及在第二时刻之后发生的第四时刻; 以及基于所确定的时间确定所述第一和第二时钟之间的时钟偏移。 可以基于时钟偏移来调整第一和/或第二时钟以同步时钟操作。 该调整可以用于例如将根据第一时钟操作的音频和/或视频组件的操作与根据第二时钟操作的音频和/或视频组件同步操作。 这些技术可以进一步包括确定时钟偏移是否有效(例如,基于扰动事件的检测或时钟的时间之间的差异)。

    Mechanism for clock synchronization

    公开(公告)号:US09432456B2

    公开(公告)日:2016-08-30

    申请号:US13754062

    申请日:2013-01-30

    IPC分类号: H04J3/06 H04L29/08 G06F1/14

    CPC分类号: H04L67/1095 G06F1/14

    摘要: A method and apparatus for synchronizing time between a master device and a target device arranged across a network, wherein the target device communicates to the master device through a PCIe interconnect includes transmitting a first message at a first time from the master device to the target device, the first message including a message indicator; and receiving a reply message at a subsequent time from the target device to the master device, the reply message including the message indicator.

    Mechanism for clock synchronization
    10.
    发明授权
    Mechanism for clock synchronization 有权
    时钟同步机制

    公开(公告)号:US08385333B2

    公开(公告)日:2013-02-26

    申请号:US12495500

    申请日:2009-06-30

    IPC分类号: H04L12/28

    CPC分类号: H04L67/1095 G06F1/14

    摘要: A method and apparatus for synchronizing time between a master device and a target device arranged across a network, wherein the target device communicates to the master device through a PCIe interconnect includes transmitting a first message at a first time from the master device to the target device, the first message including a message indicator; and receiving a reply message at a subsequent time from the target device to the master device, the reply message including the message indicator.

    摘要翻译: 一种用于同步跨越网络布置的主设备和目标设备之间的时间的方法和设备,其中所述目标设备通过PCIe互连与主设备通信包括:在第一时间从主设备向目标设备发送第一消息 第一条消息包括消息指示符; 以及在从目标设备到主设备的后续时间接收回复消息,该回复消息包括消息指示符。