公开(公告)号：US09754203B2

公开(公告)日：2017-09-05

申请号：US14219007

申请日：2014-03-19

Applicant: Technion Research and Development Foundation LTD.

Inventor： Dotan Di Castro ,  Daniel Soudry ,  Shahar Kvatinsky ,  Asaf Gal ,  Avinoam Kolodny

IPC: G06N3/063 ,  G06N3/04 ,  G06G7/163

CPC classification number: G06N3/0635 ,  G06G7/163 ,  G06N3/049

Abstract: A device, comprising: an array of cells, wherein the cells are arranged in columns and rows; wherein each cell comprises a memristive device; an interfacing circuit that is coupled to each cell of the array of cells; wherein the interfacing circuit is arranged to: receive or generate first variables and second variables; generate memristive device input signals that once provided to memristive devices of the array will cause a change in a state variable of each of the memristive devices of the cells of the array, wherein the change in the state variable of each of the memristive devices of the cells of array reflects a product of one of the first variables and one of the second variables; provide the memristive device input signals to memristive devices of the array; and receive output signals that are a function of at least products of the first variables and the second variables.

公开(公告)号：US20140289179A1

公开(公告)日：2014-09-25

申请号：US14219007

申请日：2014-03-19

Applicant: Technion Research and Development Foundation LTD.

Inventor： Dotan Di Castro ,  Daniel Soudry ,  Shahar Kvatinsky ,  Asaf Gal ,  Avinoam Kolodny

IPC: G06N3/08 ,  G06N3/063

CPC classification number: G06N3/0635 ,  G06G7/163 ,  G06N3/049

Abstract: A device, comprising: an array of cells, wherein the cells are arranged in columns and rows; wherein each cell comprises a memristive device; an interfacing circuit that is coupled to each cell of the array of cells; wherein the interfacing circuit is arranged to: receive or generate first variables and second variables; generate memristive device input signals that once provided to memristive devices of the array will cause a change in a state variable of each of the memristive devices of the cells of the array, wherein the change in the state variable of each of the memristive devices of the cells of array reflects a product of one of the first variables and one of the second variables; provide the memristive device input signals to memristive devices of the array; and receive output signals that are a function of at least products of the first variables and the second variables;

Abstract translation: 一种设备，包括：单元阵列，其中所述单元被排列成列和行; 其中每个单元包括忆阻器件; 耦合到所述单元阵列的每个单元的接口电路; 其中所述接口电路被布置成：接收或生成第一变量和第二变量; 产生一旦提供给阵列的忆阻器件的忆阻器件输入信号将导致阵列单元的每个忆阻器件的状态变量的改变，其中每个复位器件的状态变量的改变 数组的单元反映了第一个变量之一和第二个变量之一的乘积; 提供忆阻器件输入信号到阵列的忆阻器件; 并且接收至少是所述第一变量和所述第二变量的乘积的函数的输出信号;