DYNAMIC CALIBRATION OF DATA PATTERNS
    1.
    发明申请
    DYNAMIC CALIBRATION OF DATA PATTERNS 有权
    动态校准数据模式

    公开(公告)号:US20160334833A1

    公开(公告)日:2016-11-17

    申请号:US14814137

    申请日:2015-07-30

    CPC classification number: G06F1/10 G01R31/31709 G01R31/3171

    Abstract: A system for dynamically calibrating operational parameters of a Device Under Test (DUT) includes a signal generator for generating a data pattern, a DUT structured to generate a clock signal, an oscilloscope structured to measure margins of the generated clock signal compared to an eye-diagram produced on the oscilloscope from the data pattern, and a calibration unit. The calibration unit can produce a candidate a jitter value for the signal generator, receive a determination from the oscilloscope whether the data pattern generated with the candidate jitter value causes the DUT to produce the generated clock signal within a pre-determined tolerance level, and modify the jitter value accordingly. The calibration unit may also be further structured to generate voltage swing values.

    Abstract translation: 用于动态校准被测设备(DUT)的操作参数的系统包括用于产生数据模式的信号发生器,被构造成产生时钟信号的DUT,被构造为测量所生成的时钟信号的边缘的示波器, 在示波器上从数据模式生成的图和校准单元。 校准单元可以产生候选信号发生器的抖动值,接收来自示波器的确定,用候选抖动值产生的数据模式是否使DUT在预定的公差电平内产生产生的时钟信号,并修改 抖动值相应。 校准单元还可以进一步构造成产生电压摆​​幅值。

    Dynamic calibration of data patterns

    公开(公告)号:US09618965B2

    公开(公告)日:2017-04-11

    申请号:US14814137

    申请日:2015-07-30

    CPC classification number: G06F1/10 G01R31/31709 G01R31/3171

    Abstract: A system for dynamically calibrating operational parameters of a Device Under Test (DUT) includes a signal generator for generating a data pattern, a DUT structured to generate a clock signal, an oscilloscope structured to measure margins of the generated clock signal compared to an eye-diagram produced on the oscilloscope from the data pattern, and a calibration unit. The calibration unit can produce a candidate a jitter value for the signal generator, receive a determination from the oscilloscope whether the data pattern generated with the candidate jitter value causes the DUT to produce the generated clock signal within a pre-determined tolerance level, and modify the jitter value accordingly. The calibration unit may also be further structured to generate voltage swing values.

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