Mixer circuit
    1.
    发明授权
    Mixer circuit 失效
    搅拌机电路

    公开(公告)号:US07915943B2

    公开(公告)日:2011-03-29

    申请号:US12522647

    申请日:2008-01-09

    申请人: Tetsuaki Yotsuji

    发明人: Tetsuaki Yotsuji

    IPC分类号: G06F7/44 G06F7/16

    摘要: Regarding N-channel first transistor and a P-channel second transistor, their first terminals are connected to each other and their second terminals are connected to each other. Regarding third transistor and a fourth transistor, their first terminals are also connected to each other and their second terminals are also connected to each other. For the first transistor through the fourth transistor, a first capacitor through a fourth capacitor used for coupling are provided. A first impedance element through a fourth impedance element are provided in a path where a bias voltage is applied to the first transistor through the fourth transistor. A fifth capacitor is provided between the first terminals of the first-fourth transistors and a first input terminal. A fifth impedance element and a sixth impedance element are provided as differential pair loads.

    摘要翻译: 关于N沟道第一晶体管和P沟道第二晶体管,它们的第一端子彼此连接,并且它们的第二端子彼此连接。 关于第三晶体管和第四晶体管,它们的第一端子也彼此连接,并且它们的第二端子也彼此连接。 对于通过第四晶体管的第一晶体管,提供通过用于耦合的第四电容器的第一电容器。 通过第四阻抗元件的第一阻抗元件设置在偏置电压通过第四晶体管施加到第一晶体管的路径中。 在第一第四晶体管的第一端子和第一输入端子之间提供第五电容器。 提供第五阻抗元件和第六阻抗元件作为差分对负载。

    Phase-locked loop circuit
    2.
    发明授权
    Phase-locked loop circuit 有权
    锁相环电路

    公开(公告)号:US08378721B2

    公开(公告)日:2013-02-19

    申请号:US13018767

    申请日:2011-02-01

    申请人: Tetsuaki Yotsuji

    发明人: Tetsuaki Yotsuji

    IPC分类号: H03L7/06

    CPC分类号: H03L3/00 H03L2207/06

    摘要: A gm-C VCO oscillates at a frequency that corresponds to an input control voltage. A divider divides the frequency of an oscillation signal output from the gm-C VCO. A phase comparison signal generating unit generates a phase difference signal that corresponds to the phase difference between the oscillation signal thus frequency-divided by the divider and a reference clock signal. A loop filter performs filtering of the phase difference signal so as to generate the control voltage. A startup circuit injects a seed pulse into the gm-C VCO at a timing determined based upon the level of a detection signal that corresponds to the control voltage.

    摘要翻译: gm-C VCO以对应于输入控制电压的频率振荡。 分频器分频从gm-C VCO输出的振荡信号的频率。 相位比较信号生成单元生成与由分频器分频的振荡信号和基准时钟信号之间的相位差对应的相位差信号。 环路滤波器对相位差信号进行滤波,以产生控制电压。 启动电路以基于对应于控制电压的检测信号的电平确定的定时将种子脉冲注入到gm-C VCO中。

    PHASE-LOCKED LOOP CIRCUIT
    3.
    发明申请
    PHASE-LOCKED LOOP CIRCUIT 有权
    相位锁定环路

    公开(公告)号:US20120112808A1

    公开(公告)日:2012-05-10

    申请号:US13018767

    申请日:2011-02-01

    申请人: Tetsuaki Yotsuji

    发明人: Tetsuaki Yotsuji

    IPC分类号: H03L7/06

    CPC分类号: H03L3/00 H03L2207/06

    摘要: A gm-C VCO oscillates at a frequency that corresponds to an input control voltage. A divider divides the frequency of an oscillation signal output from the gm-C VCO. A phase comparison signal generating unit generates a phase difference signal that corresponds to the phase difference between the oscillation signal thus frequency-divided by the divider and a reference clock signal. A loop filter performs filtering of the phase difference signal so as to generate the control voltage. A startup circuit injects a seed pulse into the gm-C VCO at a timing determined based upon the level of a detection signal that corresponds to the control voltage.

    摘要翻译: gm-C VCO以对应于输入控制电压的频率振荡。 分频器分频从gm-C VCO输出的振荡信号的频率。 相位比较信号生成单元生成与由分频器分频的振荡信号和基准时钟信号之间的相位差对应的相位差信号。 环路滤波器对相位差信号进行滤波,以产生控制电压。 启动电路以基于对应于控制电压的检测信号的电平确定的定时将种子脉冲注入到gm-C VCO中。

    MIXER CIRCUIT
    4.
    发明申请
    MIXER CIRCUIT 失效
    混频器电路

    公开(公告)号:US20100085104A1

    公开(公告)日:2010-04-08

    申请号:US12522647

    申请日:2008-01-09

    申请人: Tetsuaki Yotsuji

    发明人: Tetsuaki Yotsuji

    IPC分类号: G06F7/44

    摘要: Regarding N-channel first transistor and a P-channel second transistor, their first terminals are connected to each other and their second terminals are connected to each other. Regarding third transistor and a fourth transistor, their first terminals are also connected to each other and their second terminals are also connected to each other. For the first transistor through the fourth transistor, a first capacitor through a fourth capacitor used for coupling are provided. A first impedance element through a fourth impedance element are provided in a path where a bias voltage is applied to the first transistor through the fourth transistor. A fifth capacitor is provided between the first terminals of the first-fourth transistors and a first input terminal. A fifth impedance element and a sixth impedance element are provided as differential pair loads.

    摘要翻译: 关于N沟道第一晶体管和P沟道第二晶体管,它们的第一端子彼此连接,并且它们的第二端子彼此连接。 关于第三晶体管和第四晶体管,它们的第一端子也彼此连接,并且它们的第二端子也彼此连接。 对于通过第四晶体管的第一晶体管,提供通过用于耦合的第四电容器的第一电容器。 通过第四阻抗元件的第一阻抗元件设置在偏置电压通过第四晶体管施加到第一晶体管的路径中。 在第一第四晶体管的第一端子和第一输入端子之间提供第五电容器。 提供第五阻抗元件和第六阻抗元件作为差分对负载。