Abstract:
A master electronic circuit includes a storage representing a wireless collision avoidance networking process involving collision avoidance overhead and combined with a schedulable process including a serial data transfer process and a scheduler, a wireless modem operable to transmit and receive wireless signals for the networking process and a processor coupled with the storage and with the wireless modem and operable to execute the scheduler to establish and transmit a schedule for plural serial data transfers involving the processor and distinct station identifications, and to execute the serial data transfers inside the wireless networking process and according to the schedule so as to avoid at least some of the collision avoidance overhead. Other electronic circuits, processes of making and using, and systems are disclosed.
Abstract:
A master electronic circuit (300) includes a storage (324) representing a wireless collision avoidance networking process (332) involving collision avoidance overhead and combined with a schedulable process (345) including a serial data transfer process and a scheduler, a wireless modem (350) operable to transmit and receive wireless signals for the networking process (332), and a processor (320) coupled with the storage (324) and with the wireless modem (350) and operable to execute the scheduler to establish and transmit a schedule (110) for plural serial data transfers involving the processor (320) and distinct station identifications, and to execute the serial data transfers inside the wireless networking process and according to the schedule so as to avoid at least some of the collision avoidance overhead. Other electronic circuits, processes of making and using, and systems are disclosed.