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公开(公告)号:US11881767B2
公开(公告)日:2024-01-23
申请号:US16440509
申请日:2019-06-13
发明人: Joerg Erik Goller
IPC分类号: H02M1/44 , G06F7/58 , H02M3/158 , H04B1/7075 , H02M3/04
CPC分类号: H02M1/44 , G06F7/584 , H02M3/1584 , H04B1/70756 , H02M3/04 , H02M3/1586
摘要: An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator. The timebase generator comprises a first linear feedback shift register (LFSR), a signal generator having an input coupled to an output of the first LFSR; and a digital divider comprising a second LFSR and a programmable digital divider, wherein a clock input of the programmable digital divider is coupled to an output of the signal generator, wherein an output of the programmable digital divider is coupled to a clock input of the first LFSR and is coupled to a clock input of the second LFSR, and wherein an output of the second LFSR is coupled to a program input of the programmable digital divider.
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公开(公告)号:US10361627B1
公开(公告)日:2019-07-23
申请号:US16129347
申请日:2018-09-12
发明人: Joerg Erik Goller
IPC分类号: H02M3/335 , H02M1/44 , G06F7/58 , H02M3/158 , H04B1/7075
摘要: An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator. The timebase generator comprises a first linear feedback shift register (LFSR), a signal generator having an input coupled to an output of the first LFSR; and a digital divider comprising a second LFSR and a programmable digital divider, wherein a clock input of the programmable digital divider is coupled to an output of the signal generator, wherein an output of the programmable digital divider is coupled to a clock input of the first LFSR and is coupled to a clock input of the second LFSR, and wherein an output of the second LFSR is coupled to a program input of the programmable digital divider.
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公开(公告)号:US11601053B2
公开(公告)日:2023-03-07
申请号:US16712693
申请日:2019-12-12
发明人: Joerg Erik Goller
摘要: An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator. The timebase generator comprises a linear feedback shift register (LFSR) having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer, wherein the first logic inverter has an input coupled to a most significant bit of the output of the LFSR, wherein the first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR and a second input coupled to an output of the first logic inverter, wherein a selector input of the first multiplexer is coupled to an output of the first AND logic gate.
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公开(公告)号:US20200083802A1
公开(公告)日:2020-03-12
申请号:US16440509
申请日:2019-06-13
发明人: Joerg Erik Goller
IPC分类号: H02M1/44 , H04B1/7075 , G06F7/58 , H02M3/158
摘要: An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator. The timebase generator comprises a first linear feedback shift register (LFSR), a signal generator having an input coupled to an output of the first LFSR; and a digital divider comprising a second LFSR and a programmable digital divider, wherein a clock input of the programmable digital divider is coupled to an output of the signal generator, wherein an output of the programmable digital divider is coupled to a clock input of the first LFSR and is coupled to a clock input of the second LFSR, and wherein an output of the second LFSR is coupled to a program input of the programmable digital divider.
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公开(公告)号:US10541610B1
公开(公告)日:2020-01-21
申请号:US16107742
申请日:2018-08-21
发明人: Joerg Erik Goller
IPC分类号: H02M3/157 , H02M3/156 , G06F7/58 , G01R31/3183 , H02M1/08
摘要: An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator. The timebase generator comprises a linear feedback shift register (LFSR) having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer, wherein the first logic inverter has an input coupled to a most significant bit of the output of the LFSR, wherein the first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR and a second input coupled to an output of the first logic inverter, wherein a selector input of the first multiplexer is coupled to an output of the first AND logic gate.
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