公开(公告)号：US20230005880A1

公开(公告)日：2023-01-05

申请号：US17364735

申请日：2021-06-30

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Ashok Surendra Prabhu ,  Hau Nguyen ,  Kurt Edward Sincerbox ,  Makoto Shibuya

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H01L21/48

Abstract: In a described example, an apparatus includes: a first package substrate having a die mount surface; a semiconductor die flip chip mounted to the first package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the semiconductor die having solder bumps, wherein the solder bumps form solder joints to the package substrate; a second package substrate having a thermal pad positioned with the thermal pad over a backside surface of the semiconductor die, the thermal pad comprising a thermally conductive material; and a mold compound covering a portion of the first package substrate, a portion of the second package substrate, the semiconductor die, and the post connects, thermal pad having a surface exposed from the mold compound.

公开(公告)号：US11955456B2

公开(公告)日：2024-04-09

申请号：US17364735

申请日：2021-06-30

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Ashok Surendra Prabhu ,  Hau Nguyen ,  Kurt Edward Sincerbox ,  Makoto Shibuya

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L24/94 ,  H01L21/4825 ,  H01L21/4839 ,  H01L21/563 ,  H01L23/3157 ,  H01L23/367 ,  H01L23/49861 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0655 ,  H01L24/97 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2924/182

Abstract: In a described example, an apparatus includes: a first package substrate having a die mount surface; a semiconductor die flip chip mounted to the first package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the semiconductor die having solder bumps, wherein the solder bumps form solder joints to the package substrate; a second package substrate having a thermal pad positioned with the thermal pad over a backside surface of the semiconductor die, the thermal pad comprising a thermally conductive material; and a mold compound covering a portion of the first package substrate, a portion of the second package substrate, the semiconductor die, and the post connects, thermal pad having a surface exposed from the mold compound.