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公开(公告)号:US20210365374A1
公开(公告)日:2021-11-25
申请号:US16882344
申请日:2020-05-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeet Ashok CHACHAD , Timothy David ANDERSON , Pramod Kumar SWAMI , Naveen BHORIA , David Matthew THOMPSON , Neelima MURALIDHARAN
IPC: G06F12/0811 , G06F12/10
Abstract: An apparatus includes first CPU and second CPU cores, a L1 cache subsystem coupled to the first CPU core and comprising a L1 controller, and a L2 cache subsystem coupled to the L1 cache subsystem and to the second CPU core. The L2 cache subsystem includes a L2 memory and a L2 controller configured to operate in an aliased mode in response to a value in a memory map control register being asserted. In the aliased mode, the L2 controller receives a first request from the first CPU core directed to a virtual address in the L2 memory, receives a second request from the second CPU core directed to the virtual address in the L2 memory, directs the first request to a physical address A in the L2 memory, and directs the second request to a physical address B in the L2 memory.
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公开(公告)号:US20190295262A1
公开(公告)日:2019-09-26
申请号:US16157861
申请日:2018-10-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Soyeb Noormohammed NAGORI , Manu MATHEW , Kumar DESAPPAN , Pramod Kumar SWAMI
Abstract: A method for video object detection includes detecting an object in a first video frame, and selecting a first interest point and a second interest point of the object. The first interest point is in a first region of interest located at a first corner of a box surrounding the object. The second interest point is in a second region of interest located at a second corner of the box. The second corner is diagonally opposite the first corner. A first optical flow of the first interest point and a second optical flow of the second interest point are determined. A location of the object in a second video frame is estimated by determining, in the second video frame, a location of the first interest point based on the first optical flow and a location of the second interest point based on the second optical flow.
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公开(公告)号:US20240320045A1
公开(公告)日:2024-09-26
申请号:US18675294
申请日:2024-05-28
Applicant: Texas Instruments Incorporated
Inventor: Mihir Narendra MODY , Kedar Satish CHITNIS , Kumar DESAPPAN , David SMITH , Pramod Kumar SWAMI , Shyam JAGANNATHAN
CPC classification number: G06F9/5016 , G06F9/5077 , G06F12/00 , G06F12/0223 , G06F2009/45583 , G06F9/50 , G06F9/5022 , G06N3/02 , G06N3/10 , G06N20/00
Abstract: Techniques for executing machine learning (ML) models including receiving an indication to run an ML model on a processing core; receiving a static memory allocation for running the ML model on the processing core; determining that a layer of the ML model uses more memory than the static memory allocated; transmitting, to a shared memory, a memory request for blocks of the shared memory; receiving an allocation of the requested blocks; running the layer of the ML model using the static memory and the range of memory addresses; and outputting results of running the layer of the ML model.
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公开(公告)号:US20230013998A1
公开(公告)日:2023-01-19
申请号:US17378841
申请日:2021-07-19
Applicant: Texas Instruments Incorporated
Inventor: Mihir Narendra MODY , Kedar Satish CHITNIS , Kumar DESAPPAN , David SMITH , Pramod Kumar SWAMI , Shyam JAGANNATHAN
Abstract: Techniques for executing machine learning (ML) models including receiving an indication to run an ML model on a processing core; receiving a static memory allocation for running the ML model on the processing core; determining that a layer of the ML model uses more memory than the static memory allocated; transmitting, to a shared memory, a memory request for blocks of the shared memory; receiving an allocation of the requested blocks; running the layer of the ML model using the static memory and the range of memory addresses; and outputting results of running the layer of the ML model.
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公开(公告)号:US20220391776A1
公开(公告)日:2022-12-08
申请号:US17342037
申请日:2021-06-08
Applicant: Texas Instruments Incorporated
Inventor: Mihir Narendra MODY , Kumar DESAPPAN , Kedar Satish CHITNIS , Pramod Kumar SWAMI , Kevin Patrick LAVERY , Prithvi Shankar YEYYADI ANANTHA , Shyam JAGANNATHAN
Abstract: Techniques for executing machine learning (ML) models including receiving an indication to run a ML model, receiving synchronization information for organizing the running of the ML model with other ML models, determining, based on the synchronization information, to delay running the ML model, delaying the running of the ML model, determining, based on the synchronization information, a time to run the ML model; and running the ML model at the time.
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公开(公告)号:US20240078284A1
公开(公告)日:2024-03-07
申请号:US18499627
申请日:2023-11-01
Applicant: Texas Instruments Incorporated
Inventor: Deepak Kumar PODDAR , Soyeb NAGORI , Hrushikesh Tukaram GARUD , Pramod Kumar SWAMI
CPC classification number: G06F17/16 , G06F7/523 , G06F9/5027 , G06F18/22 , G06V10/75
Abstract: A hardware accelerator is configured to perform matrix multiplication and/or additional operations to optimize keypoint matching. A sum of squared error (SSE) calculation may be determined by utilizing the hardware accelerator to perform matrix multiplication to obtain a cost matrix for two sets of keypoint descriptors from two images. The hardware accelerator may determine a best cost calculation for each keypoint in each direction, which is utilized to perform keypoint matching.
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公开(公告)号:US20220327055A1
公开(公告)日:2022-10-13
申请号:US17847131
申请日:2022-06-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeet Ashok CHACHAD , Timothy David ANDERSON , Pramod Kumar SWAMI , Naveen BHORIA , David Matthew THOMPSON , Neelima MURALIDHARAN
IPC: G06F12/0811 , G06F12/10
Abstract: An apparatus includes first CPU and second CPU cores, a L1 cache subsystem coupled to the first CPU core and comprising a L1 controller, and a L2 cache subsystem coupled to the L1 cache subsystem and to the second CPU core. The L2 cache subsystem includes a L2 memory and a L2 controller configured to operate in an aliased mode in response to a value in a memory map control register being asserted. In the aliased mode, the L2 controller receives a first request from the first CPU core directed to a virtual address in the L2 memory, receives a second request from the second CPU core directed to the virtual address in the L2 memory, directs the first request to a physical address A in the L2 memory, and directs the second request to a physical address B in the L2 memory.
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公开(公告)号:US20210056710A1
公开(公告)日:2021-02-25
申请号:US17093681
申请日:2020-11-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Soyeb Noormohammed NAGORI , Manu MATHEW , Kumar DESAPPAN , Pramod Kumar SWAMI
Abstract: A method for video object detection includes detecting an object in a first video frame, and selecting a first interest point and a second interest point of the object. The first interest point is in a first region of interest located at a first corner of a box surrounding the object. The second interest point is in a second region of interest located at a second corner of the box. The second corner is diagonally opposite the first corner. A first optical flow of the first interest point and a second optical flow of the second interest point are determined. A location of the object in a second video frame is estimated by determining, in the second video frame, a location of the first interest point based on the first optical flow and a location of the second interest point based on the second optical flow.
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公开(公告)号:US20200272892A1
公开(公告)日:2020-08-27
申请号:US16797871
申请日:2020-02-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Kumar DESAPPAN , Mihir Narendra MODY , Pramod Kumar SWAMI , Anshu JAIN , Rishabh GARG
IPC: G06N3/063 , G06N3/08 , G06F12/0804 , G06T1/60
Abstract: Techniques including receiving a first set of values for processing by a machine learning (ML) network, storing a first portion of the first set of values in an on-chip memory, processing the first portion of the first set of values in a first layer of the ML network to generate a second portion of a second set of values, overwriting the stored first portion with the generated second portion, processing the second portion in a second layer of the ML network to generate a third portion of a third set of values, storing the third portion, repeating the steps of storing the first portion, processing the first portion, overwriting the stored first portion, processing the second portion, and storing the third portion for a fourth portion of the first set of values until all portions of the first set of values are processed to generate the third set of values.
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公开(公告)号:US20240153105A1
公开(公告)日:2024-05-09
申请号:US18414772
申请日:2024-01-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Deepak Kumar PODDAR , Anshu JAIN , Desappan KUMAR , Pramod Kumar SWAMI
IPC: G06T7/246
CPC classification number: G06T7/246 , G06T2200/28 , G06T2207/20016 , G06T2207/30241
Abstract: A method for sparse optical flow based tracking in a computer vision system is provided that includes detecting feature points in a frame captured by a monocular camera in the computer vision system to generate a plurality of detected feature points, generating a binary image indicating locations of the detected feature points with a bit value of one, wherein all other locations in the binary image have a bit value of zero, generating another binary image indicating neighborhoods of currently tracked points, wherein locations of the neighborhoods in the binary image have a bit value of zero and all other locations in the binary image have a bit value of one, and performing a binary AND of the two binary images to generate another binary image, wherein locations in the binary image having a bit value of one indicate new feature points detected in the frame.
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