公开(公告)号：US20240063107A1

公开(公告)日：2024-02-22

申请号：US17892202

申请日：2022-08-22

Applicant: Texas Instruments Incorporated

Inventor： Jason Colte ,  Jerry Cayabyab ,  Julian Carlo Barbadillo ,  John Carlo Molina ,  Richard Sumalinog ,  Raust Glenn Magcaling ,  Ruby Ann Camenforte

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L23/49822 ,  H01L21/4857 ,  H01L24/16 ,  H01L24/81 ,  H01L24/13 ,  H01L21/561 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/81815

Abstract: An electronic device includes a multilevel package substrate, a semiconductor die mounted to the multilevel package substrate, and a package structure that encloses the semiconductor die and a portion of the multilevel package substrate. The multilevel package substrate has a first level, a second level, a first metal stack, and a second metal stack. The first metal stack includes a first set of contiguous metal structures of the first and second levels, the second metal stack includes a second set of contiguous metal structures of the first and second levels, the first and second metal stacks are spaced apart from one another, a first metal trace of the first metal stack partially overlaps a second metal trace of the second metal stack, and the first and second metal traces are in different levels of the multilevel package substrate.