公开(公告)号：US12255077B2

公开(公告)日：2025-03-18

申请号：US18488990

申请日：2023-10-17

Applicant: Texas Instruments Incorporated

Inventor： Sadia Naseem ,  Vikas Gupta

IPC: H01L23/495 ,  H01L21/48

Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.

公开(公告)号：US10559524B1

公开(公告)日：2020-02-11

申请号：US16133117

申请日：2018-09-17

Applicant: Texas Instruments Incorporated

Inventor： Sadia Naseem ,  Vikas Gupta ,  Rongwei Zhang

IPC: H01L21/00 ,  H01L29/00 ,  H01L23/12 ,  H01L23/495 ,  H01L23/64 ,  H01L23/00 ,  H01L21/56 ,  H01F27/28

Abstract: A packaged semiconductor device includes a leadframe (LF) having a plurality of laminate-supporting pedestals. A cured first die attach (DA) material is on an outer edge of the pedestals being an ultraviolet (UV)-curing DA material having a photoinitiator or a cured B-stage DA material. A cured thermally-curing DA material is on an area of the pedestals not occupied by the UV-curing DA material. A laminate component having bond pads on a top side is mounted top side up on the plurality of pedestals.

公开(公告)号：US11677152B2

公开(公告)日：2023-06-13

申请号：US17190521

申请日：2021-03-03

Applicant: Texas Instruments Incorporated

Inventor： Vikas Gupta ,  Sadia Naseem ,  Meysam Moallem

IPC: H01Q9/04 ,  H01L23/498 ,  H01L23/00 ,  H01L23/66

CPC classification number: H01Q9/0407 ,  H01L23/49822 ,  H01L23/66 ,  H01L24/81 ,  H01L2223/6677 ,  H01L2224/81815

Abstract: An antenna apparatus in a packaged electronic device includes: an antenna assembly with a conductive antenna, and an insulator; a conductive feed line extending on or in a substrate; a conductive layer with an aperture on or in the substrate between the conductive feed line and an exposed portion of the conductive antenna; and a support structure mounted to a portion of the substrate and to a portion of the antenna assembly to support the antenna assembly and to provide an air gap between the exposed portion of the conductive antenna and the aperture.

公开(公告)号：US20220285844A1

公开(公告)日：2022-09-08

申请号：US17190521

申请日：2021-03-03

Applicant: Texas Instruments Incorporated

Inventor： Vikas Gupta ,  Sadia Naseem ,  Meysam Moallem

IPC: H01Q9/04 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00

Abstract: An antenna apparatus in a packaged electronic device includes: an antenna assembly with a conductive antenna, and an insulator; a conductive feed line extending on or in a substrate; a conductive layer with an aperture on or in the substrate between the conductive feed line and an exposed portion of the conductive antenna; and a support structure mounted to a portion of the substrate and to a portion of the antenna assembly to support the antenna assembly and to provide an air gap between the exposed portion of the conductive antenna and the aperture.

公开(公告)号：US11735806B2

公开(公告)日：2023-08-22

申请号：US16151441

申请日：2018-10-04

Applicant: Texas Instruments Incorporated

Inventor： Vikas Gupta ,  Meysam Moallem ,  Sadia Naseem

IPC: H01Q1/22 ,  H01Q1/50 ,  H01L23/66 ,  H01Q21/00 ,  H01L23/498 ,  H01Q1/52 ,  H01Q13/02 ,  H01Q1/32

CPC classification number: H01Q1/2283 ,  H01L23/49838 ,  H01L23/66 ,  H01Q1/3233 ,  H01Q1/50 ,  H01Q1/525 ,  H01Q13/02 ,  H01Q21/0006 ,  H01L2223/6627 ,  H01L2223/6677

Abstract: A high frequency wireless device includes a three-dimensional (3D) antenna structure mounted on a PCB including a first antenna connected to a first waveguide feed and second antenna connected to a second waveguide feed. A packaged device on the PCB has a top metal surface including a transmit (Tx) radiating structure under the second waveguide feed and a receive (Rx) radiating structure under the first waveguide feed, and an RF connection from the top metal surface to its bottom surface. An IC die is flipchip attached to the bottom surface including at least one Rx channel and at least one Tx channel connected by the RF connection to the Rx and Tx radiating structures. Protruding metal features are on the dielectric layer under the first and second waveguide feeds on ≥2 sides of the Tx and the Rx radiating structure to create a waveguiding wall structure for directing signals.

公开(公告)号：US20210166951A1

公开(公告)日：2021-06-03

申请号：US17172043

申请日：2021-02-09

Applicant: Texas Instruments Incorporated

Inventor： Sadia Naseem ,  Vikas Gupta

IPC: H01L21/48 ,  H01L23/495

Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.

公开(公告)号：US20190279955A1

公开(公告)日：2019-09-12

申请号：US15914761

申请日：2018-03-07

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier ,  Sadia Naseem ,  Mahmud Halim Chowdhury

IPC: H01L23/00

Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.

公开(公告)号：US11791168B2

公开(公告)日：2023-10-17

申请号：US17172043

申请日：2021-02-09

Applicant: Texas Instruments Incorporated

Inventor： Sadia Naseem ,  Vikas Gupta

IPC: H01L23/495 ,  H01L21/48

CPC classification number: H01L21/4821 ,  H01L23/49582

Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.

公开(公告)号：US11031364B2

公开(公告)日：2021-06-08

申请号：US15914761

申请日：2018-03-07

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier ,  Sadia Naseem ,  Mahmud Halim Chowdhury

IPC: H01L23/00

Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.

公开(公告)号：US10916448B2

公开(公告)日：2021-02-09

申请号：US16027558

申请日：2018-07-05

Applicant: Texas Instruments Incorporated

Inventor： Sadia Naseem ,  Vikas Gupta

IPC: H01L23/495 ,  H01L21/48

Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.