公开(公告)号：US20150091616A1

公开(公告)日：2015-04-02

申请号：US14043535

申请日：2013-10-01

Applicant: Texas Instruments Incorporated

Inventor： Samiran Dasgupta ,  Devraj Matharampallil Rajagopal

IPC: H03K19/018

CPC classification number: H03K19/01818 ,  H03K19/017518

Abstract: An IO circuit capable of high voltage signaling in a low voltage BiCMOS process. The IO circuit includes a voltage rail generator circuit that receives a reference voltage and generates a voltage rail supply. A BJT (bi-polar junction transistor) buffer circuit is coupled to the voltage rail generator circuit and a pad. The BJT buffer circuit includes a pull-up circuit and a pull-down circuit. The pull-up circuit receives the voltage rail supply. The pull-down circuit is coupled to the pull-up circuit. The pad is coupled to the pull-up circuit and the pull-down circuit.

Abstract translation: 在低电压BiCMOS工艺中能够进行高电压信号的IO电路。 IO电路包括电压轨发生器电路，其接收参考电压并产生电压轨电源。 BJT（双极结晶体管）缓冲电路耦合到电压轨发生器电路和焊盘。 BJT缓冲电路包括一个上拉电路和一个下拉电路。 上拉电路接收电压轨。 下拉电路耦合到上拉电路。 该焊盘耦合到上拉电路和下拉电路。

公开(公告)号：US09054695B2

公开(公告)日：2015-06-09

申请号：US14043535

申请日：2013-10-01

Applicant: Texas Instruments Incorporated

Inventor： Samiran Dasgupta ,  Devraj Matharampallil Rajagopal

IPC: H03K19/0175 ,  H03K19/018

CPC classification number: H03K19/01818 ,  H03K19/017518

Abstract: An IO circuit capable of high voltage signaling in a low voltage BiCMOS process. The IO circuit includes a voltage rail generator circuit that receives a reference voltage and generates a voltage rail supply. A BJT (bi-polar junction transistor) buffer circuit is coupled to the voltage rail generator circuit and a pad. The BJT buffer circuit includes a pull-up circuit and a pull-down circuit. The pull-up circuit receives the voltage rail supply. The pull-down circuit is coupled to the pull-up circuit. The pad is coupled to the pull-up circuit and the pull-down circuit.

Abstract translation: 在低电压BiCMOS工艺中能够进行高电压信号的IO电路。 IO电路包括电压轨发生器电路，其接收参考电压并产生电压轨电源。 BJT（双极结晶体管）缓冲电路耦合到电压轨发生器电路和焊盘。 BJT缓冲电路包括一个上拉电路和一个下拉电路。 上拉电路接收电压轨。 下拉电路耦合到上拉电路。 该焊盘耦合到上拉电路和下拉电路。