公开(公告)号：US10892770B2

公开(公告)日：2021-01-12

申请号：US16668744

申请日：2019-10-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tanmay Halder ,  Anand Kannan

IPC: H03M1/66 ,  H03M1/44 ,  H03M1/12 ,  H03M3/00 ,  H03M1/00

Abstract: Systems and methods are disclosed for a signal convertor comprising a resistor or current source coupled to a positive virtual ground node and a negative virtual ground node, wherein the resistor or current source is configured to switch from the positive virtual ground node (VGP) to the negative virtual ground node (VGN), wherein the switching of the resistor or current source results in a shaping of the low frequency noise from the resistor.

公开(公告)号：US20250119106A1

公开(公告)日：2025-04-10

申请号：US18525324

申请日：2023-11-30

Applicant: Texas Instruments Incorporated

Inventor： Tanmay Halder ,  Anand Subramanian ,  Laxmi Vivek Tripurari ,  Anand Kannan

IPC: H03F1/56 ,  H03F3/45

Abstract: An example apparatus includes: voltage divider circuitry configured to determine a common mode voltage of a differential pair of signals having a first voltage and a second voltage; a first amplifier coupled to the voltage divider circuitry, the first amplifier configured to determine a difference between the common mode voltage and a reference common mode voltage; current compensation circuitry coupled to the first amplifier, the current compensation circuitry configured to generate a first current and a second current responsive to the difference between voltages; and a second amplifier coupled to the voltage divider circuitry and the current compensation circuitry, the second amplifier to compensate the first voltage with the first current and the second voltage with the second current.

公开(公告)号：US11152904B2

公开(公告)日：2021-10-19

申请号：US16789540

申请日：2020-02-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anand Subramanian ,  Tanmay Halder ,  Anand Kannan

IPC: H03F3/45 ,  H03G3/30 ,  H03M1/12

Abstract: A circuit includes an analog-to-digital converter (ADC). The circuit also includes an analog front end (AFE) having an AFE input and an AFE output. The AFE output is coupled the ADC's input. The AFE includes a programmable gain amplifier (PGA) having a first PGA input and a second PGA input. The PGA includes a first operational amplifier (OP AMP) with first and second OPAMP inputs. The AFE also including a programmable resistance circuit having a first programmable resistance circuit input and first and second programmable resistance circuit outputs. The first programmable resistance circuit input is coupled to the first and second PGA inputs. The programmable resistance circuit includes a resistor network having first and second balance resistances. The first balance resistance is coupled to the first and second OP AMP inputs, and the second balance resistance is coupled to the first and second OP AMP inputs.