Abstract:
A method of predistorting an input signal (902) for an amplifier is disclosed (FIG. 9). The method includes predistorting the input signal with a first set of parameters (FDPD) and a second set of parameters (CDPD) at a first time (904). The first set of parameters is updated at a second time (914). The second set of parameters is updated separately from the first set of parameters at a third time (920).
Abstract:
Example embodiment of the systems and methods of linear impairment modeling to improve digital pre-distortion adaptation performance includes a DPD module that is modified during each sample by a DPD adaptation engine. A linear impairment modeling module separates the linear and non-linear errors introduced in the power amplifier. The linear impairment model is adjusted during each sample using inputs from the input signal and from a FB post processing module. The linear impairment modeling module removes the linear errors such that the DPD adaptation engine only adapts the DPD module based on the non-linear errors. This increases system stability and allows for the correction of IQ imbalance inside the linear impairment modeling, simplifying the feedback post-processing.
Abstract:
A method of predistorting an input signal (902) for an amplifier is disclosed (FIG. 9). The method includes predistorting the input signal with a first set of parameters (FDPD) and a second set of parameters (CDPD) at a first time (904). The first set of parameters is updated at a second time (914). The second set of parameters is updated separately from the first set of parameters at a third time (920).
Abstract:
This invention is a method of power amplifier digital pre-distortion which measures a current power level of the power amplifier, stores in a look up table entries consisting of a power level and a corresponding set of digital pre-distortion coefficients, selects a set of digital pre-distortion coefficients corresponding to the measured power level. If the measured current power level is near a power level index, the digital pre-distortion coefficients correspond to the power level index. If the measured current power level is greater than the maximum power level entry, the digital pre-distortion coefficients is of the maximum power level entry. If the measured current power level is less than the minimum power level entry, the digital pre-distortion is of the minimum power level entry. If the measured current power level is not near a power level index, the digital pre-distortion coefficients are an interpolation.
Abstract:
For crest factor reduction in a first signal having first and second components, the first component is delayed. A second signal is generated in response to detecting that a peak in the first component exceeds a predetermined threshold. Amplitude of the peak in the first component is reduced in response to detecting that the peak in the first component exceeds the predetermined threshold. Reducing amplitude of the peak in the first component includes adding the second signal to the delayed first component.
Abstract:
A method to form a CFR cancellation filter for signals with dynamic power and frequency distribution by estimating the filter at the rate required by the input signal's dynamics. For mixed mode systems (for example CDMA and LTE) the CFR is computed for each stream, and combined to form the final filter.
Abstract:
A system and method for reducing peak to average power ratio in a wireless communication system. A wireless communication system includes a radio frequency wireless transmitter that includes signal peak reduction circuitry configured to reduce peak to average power ratio of a signal to be transmitted by reducing amplitude of the signal to be transmitted that is greater than a predetermined amplitude. The signal peak reduction circuitry includes a bit inverter configured to invert a bit of a symbol identified as causing the amplitude of the signal to exceed the predetermined amplitude. The bit inverter is also configured to select the bit to invert such that inversion of the bit reduces the amplitude of the signal, and such that forward error correction in a receiver wirelessly coupled to the transmitter restores the bit to a pre-inversion value.
Abstract:
For crest factor reduction in a first signal having first and second components, the first component is delayed. A second signal is generated in response to detecting that a peak in the first component exceeds a predetermined threshold. Amplitude of the peak in the first component is reduced in response to detecting that the peak in the first component exceeds the predetermined threshold. Reducing amplitude of the peak in the first component includes adding the second signal to the delayed first component.
Abstract:
This invention is a method of power amplifier digital pre-distortion which measures a current power level of the power amplifier, stores in a look up table entries consisting of a power level and a corresponding set of digital pre-distortion coefficients, selects a set of digital pre-distortion coefficients corresponding to the measured power level. If the measured current power level is near a power level index, the digital pre-distortion coefficients correspond to the power level index. If the measured current power level is greater than the maximum power level entry, the digital pre-distortion coefficients is of the maximum power level entry. If the measured current power level is less than the minimum power level entry, the digital pre-distortion is of the minimum power level entry. If the measured current power level is not near a power level index, the digital pre-distortion coefficients are an interpolation.
Abstract:
A system and method for reducing peak to average power ratio in a wireless communication system. A wireless communication system includes a radio frequency wireless transmitter that includes signal peak reduction circuitry configured to reduce peak to average power ratio of a signal to be transmitted by reducing amplitude of the signal to be transmitted that is greater than a predetermined amplitude. The signal peak reduction circuitry includes a bit inverter configured to invert a bit of a symbol identified as causing the amplitude of the signal to exceed the predetermined amplitude. The bit inverter is also configured to select the bit to invert such that inversion of the bit reduces the amplitude of the signal, and such that forward error correction in a receiver wirelessly coupled to the transmitter restores the bit to a pre-inversion value.