公开(公告)号：US20210399096A1

公开(公告)日：2021-12-23

申请号：US17291842

申请日：2019-11-07

Applicant: The Regents of the University of California

Inventor： Umesh K. Mishra ,  Stacia Keller ,  Elaheh Ahmadi ,  Chirag Gupta ,  Yusuke Tsukada

IPC: H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L29/737 ,  H01L27/092 ,  H01L29/78 ,  H01L33/32

Abstract: Strain is used to enhance the properties of p- and n-materials so as to improve the performance of III-N electronic and optoelectronic devices. In one example, transistor devices include a channel aligned along uniaxially strained or relaxed directions of the III-nitride material in the channel. Strain is introduced using buffer layers or source and drain regions of different composition.

公开(公告)号：US12230678B2

公开(公告)日：2025-02-18

申请号：US17291842

申请日：2019-11-07

Applicant: The Regents of the University of California

Inventor： Umesh K. Mishra ,  Stacia Keller ,  Elaheh Ahmadi ,  Chirag Gupta ,  Yusuke Tsukada

IPC: H01L29/20 ,  H01L27/092 ,  H01L29/205 ,  H01L29/737 ,  H01L29/778 ,  H01L29/78 ,  H01L33/32

Abstract: The disclosure describes the use of strain to enhance the properties of p- and n-materials so as to improve the performance of III-N electronic and optoelectronic devices. In one example, transistor devices include a channel aligned along uniaxially strained or relaxed directions of the III-nitride material in the channel. Strain is introduced using buffer layers or source and drain regions of different composition