公开(公告)号：US5146306A

公开(公告)日：1992-09-08

申请号：US638629

申请日：1991-01-08

申请人： Thomas V. Ferry ,  Jamil Kawa ,  Kerry M. Pierce ,  William G. Walker ,  James S. Hsue

发明人： Thomas V. Ferry ,  Jamil Kawa ,  Kerry M. Pierce ,  William G. Walker ,  James S. Hsue

IPC分类号： H03K19/003

CPC分类号： H03K19/00361

摘要： Slew-rate control is implemented in input/output device structures where MOSFETs are employed to switch the output signal. These MOSFETs each have a substrate, an insulating layer adjacent to the substrate and a strip of semiconductor material separated from the substrate by the insulating layer. The strip of semiconductor material functions as the gate of the MOSFET. The strip of semiconductor material does not form a closed loop. One end of the strip of a first transistor is connected to one end of the strip of the second transistor. Thus, the gates of the two transistors are placed in series so that they are not switched on at the same time. A delay is thereby automatically introduced between the switching on of the two transistors. The delay is controlled by placing metal straps across selected transistor gates to effectively bypass the delays caused by the current propagating through the gates. Further control of the delay is gained by use of a feedback signal to increase or decrease the current in the gates.

摘要翻译： 在使用MOSFET来切换输出信号的输入/输出器件结构中实现压摆率控制。 这些MOSFET各自具有基板，与基板相邻的绝缘层和通过绝缘层与基板分离的半导体材料条。 半导体材料条作为MOSFET的栅极起作用。 半导体材料条不形成闭环。 第一晶体管的条的一端连接到第二晶体管的条的一端。 因此，两个晶体管的栅极被串联放置，使得它们不被同时接通。 因此在两个晶体管的接通之间自动引入延迟。 通过将金属带放置在选定的晶体管栅极上来有效地绕过由栅极传播的电流引起的延迟来控制延迟。 通过使用反馈信号来增加或减少门中的电流来获得延迟的进一步控制。

公开(公告)号：US5231311A

公开(公告)日：1993-07-27

申请号：US710838

申请日：1991-06-03

申请人： Thomas V. Ferry ,  Jamil Kawa ,  Kerry M. Pierce ,  William G. Walker ,  Michael A. Zampaglione ,  James S. Hsue

发明人： Thomas V. Ferry ,  Jamil Kawa ,  Kerry M. Pierce ,  William G. Walker ,  Michael A. Zampaglione ,  James S. Hsue

IPC分类号： H03K19/003

CPC分类号： H03K19/00361

摘要： A buffer characterized by a pull-up network and a pull-down network which are both coupled between an input and an output of the buffer. Each of the networks include a number of switch elements which can be sequentially turned on or off by means of an RC network to provide slew-rate control for the buffer. Preferably, each of the networks are associated with diode bypass networks to reduce crowbar current. In operation, both the pull-up network and the pull-down network turn on slowly but turn off very quickly due to the diode bypass networks.

摘要翻译： 一种缓冲器，其特征在于上拉网络和下拉网络，两者都耦合在缓冲器的输入和输出之间。 每个网络包括多个开关元件，其可以通过RC网络被顺序地接通或断开，以为缓冲器提供压摆率控制。 优选地，每个网络与二极管旁路网络相关联，以减少撬动电流。 在运行中，上拉网络和下拉网络均缓慢启动，但由于二极管旁路网络，它们都很快关闭。