公开(公告)号：US08503482B2

公开(公告)日：2013-08-06

申请号：US13123124

申请日：2008-11-19

申请人： Ting Zhou ,  Robin J. Tang ,  Ephrem C. Wu ,  Tezaswi Raja

发明人： Ting Zhou ,  Robin J. Tang ,  Ephrem C. Wu ,  Tezaswi Raja

IPC分类号： H04J3/00 ,  H04J3/06

CPC分类号： G06F13/4221 ,  Y02D10/14 ,  Y02D10/151

摘要： A method of sending signals, including data and timing information, between transportation units on a communication bus of an integrated circuit, by generating clock triggers for every transportation unit on the bus, thereby initiating each preceding one of the transportation units to start sending the signals in a wave-front to an adjacent succeeding one of the transportation units, where the wave-front is initiated at each of the transportation units at a common point in time, and every transportation unit applying a timing adjustment to at least one of the data and timing information that it receives in the signals from the preceding transportation unit, to at least one of (1) capture the data from the preceding transportation unit, (2) relay the data without modification from the preceding transportation unit to the succeeding transportation unit on the communication bus, and (3) load new data to the communication bus, with updated timing information in a succeeding wave-front.

摘要翻译： 一种在集成电路的通信总线上的传送单元之间发送信号（包括数据和定时信息）的方法，通过为总线上的每个传送单元生成时钟触发，从而启动每个前一个传输单元以开始发送信号 在相邻的后一个运输单元的波前，其中波前在公共时间点在每个运输单元处开始，并且每个运输单元对至少一个数据施加定时调整 （1）捕获来自前一个运输单元的数据中的至少一个，（2）将来自前一个运输单元的数据从前一个运输单元传送到后续运输单元 在通信总线上，以及（3）将新数据加载到通信总线，并在随后的波前更新定时信息。

公开(公告)号：US20110211582A1

公开(公告)日：2011-09-01

申请号：US13123124

申请日：2008-11-19

申请人： Ting Zhou ,  Robin J. Tang ,  Ephrem C. Wu ,  Tezaswi Raja

发明人： Ting Zhou ,  Robin J. Tang ,  Ephrem C. Wu ,  Tezaswi Raja

IPC分类号： H04J3/06 ,  H04L12/56

CPC分类号： G06F13/4221 ,  Y02D10/14 ,  Y02D10/151

摘要： A method of sending signals, including data and timing information, between transportation units on a communication bus of an integrated circuit, by generating clock triggers for every transportation unit on the bus, thereby initiating each preceding one of the transportation units to start sending the signals in a wave-front to an adjacent succeeding one of the transportation units, where the wave-front is initiated at each of the transportation units at a common point in time, and every transportation unit applying a timing adjustment to at least one of the data and timing information that it receives in the signals from the preceding transportation unit, to at least one of (1) capture the data from the preceding transportation unit, (2) relay the data without modification from the preceding transportation unit to the succeeding transportation unit on the communication bus, and (3) load new data to the communication bus, with updated timing information in a succeeding wave-front.

摘要翻译： 一种在集成电路的通信总线上的传送单元之间发送信号（包括数据和定时信息）的方法，通过为总线上的每个传送单元生成时钟触发，从而启动每个前一个传输单元以开始发送信号 在相邻的后一个运输单元的波前，其中波前在公共时间点在每个运输单元处开始，并且每个运输单元对至少一个数据施加定时调整 （1）捕获来自前一个运输单元的数据中的至少一个，（2）将来自前一个运输单元的数据从前一个运输单元传送到后续运输单元 在通信总线上，以及（3）将新数据加载到通信总线，并在随后的波前更新定时信息。

公开(公告)号：US08181147B2

公开(公告)日：2012-05-15

申请号：US12493658

申请日：2009-06-29

申请人： Robin Tang ,  Ephrem Wu ,  Tezaswi Raja

发明人： Robin Tang ,  Ephrem Wu ,  Tezaswi Raja

IPC分类号： G06F17/50

CPC分类号： G06F17/5063 ,  G11C11/4074

摘要： Various embodiments of systems and methods are disclosed for providing adaptive body bias control. One embodiment comprises a method for adaptive body bias control. One such method comprises: modeling parametric data associated with a chip design; modeling critical path data associated with the chip design; providing a chip according to the chip design; storing the parametric data and the critical path data in a memory on the chip; reading data from a parametric sensor on the chip; based on the data from the parametric sensor and the stored critical path and parametric data, determining an optimized bulk node voltage for reducing power consumption of the chip without causing a timing failure; and adjusting the bulk node voltage according to the optimized bulk node voltage.

摘要翻译： 公开了用于提供自适应体偏置控制的系统和方法的各种实施例。 一个实施例包括用于自适应体偏置控制的方法。 一种这样的方法包括：对与芯片设计相关联的参数数据进行建模; 建模与芯片设计相关的关键路径数据; 根据芯片设计提供芯片; 将参数数据和关键路径数据存储在芯片上的存储器中; 从芯片上的参数传感器读取数据; 基于来自参数传感器和存储的关键路径和参数数据的数据，确定优化的体节点电压以降低芯片的功耗而不引起定时故障; 并根据优化的体节点电压调整体节点电压。

公开(公告)号：US20130191656A1

公开(公告)日：2013-07-25

申请号：US13357352

申请日：2012-01-24

申请人： Sagheer Ahmad ,  Tezaswi Raja

发明人： Sagheer Ahmad ,  Tezaswi Raja

IPC分类号： G06F1/26

CPC分类号： G06F1/189 ,  G06F1/3243 ,  G06F1/3287 ,  H03K19/0016 ,  Y02D10/152 ,  Y02D10/171

摘要： Embodiments related to controlling power distribution within a microprocessor are provided. In one example, a microprocessor comprising a power supply is provided. The example microprocessor also includes a plurality of power gate zones configured to receive power from the power supply, each power gate zone including a plurality of power gates, where the power gates within any given one of the power gate zones are controlled by the microprocessor independently of its control of power gates within any other of the power gate zones. The example microprocessor is operative to cause power initially to be supplied to a first power gate in a first one of the power gate zones, power then to be supplied to a second power gate in a second one of the power gate zones, and power then to be supplied to a third power gate in the first one of the power gate zones.

摘要翻译： 提供了关于控制微处理器内的配电的实施例。 在一个示例中，提供了包括电源的微处理器。 示例性微处理器还包括多个电源栅区，其被配置为从电源接收电力，每个电源栅区包括多个功率门，其中任何给定的一个功率门区内的功率门由微处理器独立地控制 控制任何其他电源门区内的电源门。 该示例性微处理器可操作以最初将功率提供给第一个功率门区域中的第一功率门，然后供电到第二个功率门区域中的第二功率门，然后电源 被供应到第一个功率门区中的第三电源门。

公开(公告)号：US08949645B2

公开(公告)日：2015-02-03

申请号：US13357352

申请日：2012-01-24

申请人： Sagheer Ahmad ,  Tezaswi Raja

发明人： Sagheer Ahmad ,  Tezaswi Raja

IPC分类号： G06F1/26 ,  G06F1/18

CPC分类号： G06F1/189 ,  G06F1/3243 ,  G06F1/3287 ,  H03K19/0016 ,  Y02D10/152 ,  Y02D10/171

摘要： Embodiments related to controlling power distribution within a microprocessor are provided. In one example, a microprocessor comprising a power supply is provided. The example microprocessor also includes a plurality of power gate zones configured to receive power from the power supply, each power gate zone including a plurality of power gates, where the power gates within any given one of the power gate zones are controlled by the microprocessor independently of its control of power gates within any other of the power gate zones. The example microprocessor is operative to cause power initially to be supplied to a first power gate in a first one of the power gate zones, power then to be supplied to a second power gate in a second one of the power gate zones, and power then to be supplied to a third power gate in the first one of the power gate zones.

摘要翻译： 提供了关于控制微处理器内的配电的实施例。 在一个示例中，提供了包括电源的微处理器。 示例性微处理器还包括多个电源栅区，其被配置为从电源接收电力，每个电源栅区包括多个功率门，其中任何给定的一个功率门区内的功率门由微处理器独立地控制 控制任何其他电源门区内的电源门。 该示例性微处理器可操作以最初将功率提供给第一个功率门区域中的第一功率门，然后供电到第二个功率门区域中的第二功率门，然后电源 被供应到第一个功率门区中的第三电源门。

公开(公告)号：US20100333057A1

公开(公告)日：2010-12-30

申请号：US12493658

申请日：2009-06-29

申请人： Robin Tang ,  Ephrem Wu ,  Tezaswi Raja

发明人： Robin Tang ,  Ephrem Wu ,  Tezaswi Raja

IPC分类号： G06F17/50

CPC分类号： G06F17/5063 ,  G11C11/4074

摘要： Various embodiments of systems and methods are disclosed for providing adaptive body bias control. One embodiment comprises a method for adaptive body bias control. One such method comprises: modeling parametric data associated with a chip design; modeling critical path data associated with the chip design; providing a chip according to the chip design; storing the parametric data and the critical path data in a memory on the chip; reading data from a parametric sensor on the chip; based on the data from the parametric sensor and the stored critical path and parametric data, determining an optimized bulk node voltage for reducing power consumption of the chip without causing a timing failure; and adjusting the bulk node voltage according to the optimized bulk node voltage.

摘要翻译： 公开了用于提供自适应体偏置控制的系统和方法的各种实施例。 一个实施例包括用于自适应体偏置控制的方法。 一种这样的方法包括：对与芯片设计相关联的参数数据进行建模; 建模与芯片设计相关的关键路径数据; 根据芯片设计提供芯片; 将参数数据和关键路径数据存储在芯片上的存储器中; 从芯片上的参数传感器读取数据; 基于来自参数传感器和存储的关键路径和参数数据的数据，确定优化的体节点电压以降低芯片的功耗而不引起定时故障; 并根据优化的体节点电压调整体节点电压。