Off Chip Memory for Distributed Tessellation
    1.
    发明申请
    Off Chip Memory for Distributed Tessellation 有权
    用于分布式镶嵌的片外存储器

    公开(公告)号:US20130169634A1

    公开(公告)日:2013-07-04

    申请号:US13449410

    申请日:2012-04-18

    IPC分类号: G06T17/20

    CPC分类号: G06T17/20 G06T15/005

    摘要: Embodiments include an apparatus, a computer readable medium and a method for distributing tessellations within an accelerated processing device (APD) including at least two compute units. Embodiments include processing a plurality of patches in a first compute unit using a hull shader to generate hull shader output data. Once generated, hull shader output data is stored to an off-chip memory when tessellation factors associated with the shader program are greater than a configured threshold. Once stored in the off-chip memory, at least a portion of the hull shader output data is dynamically processed using a second compute unit.

    摘要翻译: 实施例包括一种装置,计算机可读介质和用于在包括至少两个计算单元的加速处理装置(APD)内分配镶嵌的方法。 实施例包括使用船体着色器在第一计算单元中处理多个补丁以生成船体着色器输出数据。 一旦生成,当与着色器程序相关联的细分因素大于配置的阈值时,将船体着色器输出数据存储到片外存储器中。 一旦存储在片外存储器中,使用第二计算单元动态地处理至少一部分船体着色器输出数据。

    Tessellation Patterns
    2.
    发明申请
    Tessellation Patterns 有权
    镶嵌模式

    公开(公告)号:US20130162651A1

    公开(公告)日:2013-06-27

    申请号:US13336635

    申请日:2011-12-23

    IPC分类号: G06T11/20

    CPC分类号: G06T17/20

    摘要: Methods, systems, and computer readable media embodiments are disclosed for generating primitives in a grid. Embodiments include generating a set of vertices in a section of the grid, selecting one or more vertices in the set of vertices in an order based on a proximity of the vertices to a boundary edge of the grid, and generating primitives based on the order of the selected vertices.

    摘要翻译: 公开了用于在网格中生成图元的方法,系统和计算机可读介质实施例。 实施例包括在网格的一部分中生成一组顶点,基于顶点到网格的边界边缘的顺序,以一定顺序选择顶点集合中的一个或多个顶点,并且基于网格的顺序生成图元 所选顶点。

    Off chip memory for distributed tessellation
    3.
    发明授权
    Off chip memory for distributed tessellation 有权
    用于分布式镶嵌的片外存储器

    公开(公告)号:US09390554B2

    公开(公告)日:2016-07-12

    申请号:US13449410

    申请日:2012-04-18

    IPC分类号: G06T15/30 G06T17/20 G06T15/00

    CPC分类号: G06T17/20 G06T15/005

    摘要: Embodiments include an apparatus, a computer readable medium and a method for distributing tessellations within an accelerated processing device (APD) including at least two compute units. Embodiments include processing a plurality of patches in a first compute unit using a hull shader to generate hull shader output data. Once generated, hull shader output data is stored to an off-chip memory when tessellation factors associated with the shader program are greater than a configured threshold. Once stored in the off-chip memory, at least a portion of the hull shader output data is dynamically processed using a second compute unit.

    摘要翻译: 实施例包括一种装置,计算机可读介质和用于在包括至少两个计算单元的加速处理装置(APD)内分配镶嵌的方法。 实施例包括使用船体着色器在第一计算单元中处理多个补丁以生成船体着色器输出数据。 一旦生成,当与着色器程序相关联的细分因素大于配置的阈值时,将船体着色器输出数据存储到片外存储器中。 一旦存储在片外存储器中,使用第二计算单元动态地处理至少一部分船体着色器输出数据。

    Tessellation patterns
    4.
    发明授权
    Tessellation patterns 有权
    镶嵌图案

    公开(公告)号:US08854374B2

    公开(公告)日:2014-10-07

    申请号:US13336635

    申请日:2011-12-23

    IPC分类号: G06T11/20

    CPC分类号: G06T17/20

    摘要: Methods, systems, and computer readable media embodiments are disclosed for generating primitives in a grid. Embodiments include generating a set of vertices in a section of the grid, selecting one or more vertices in the set of vertices in an order based on a proximity of the vertices to a boundary edge of the grid, and generating primitives based on the order of the selected vertices.

    摘要翻译: 公开了用于在网格中生成图元的方法,系统和计算机可读介质实施例。 实施例包括在网格的一部分中生成一组顶点,基于顶点到网格的边界边缘的顺序,以一定顺序选择顶点集合中的一个或多个顶点,并且基于网格的顺序生成图元 所选顶点。

    Tessellation engine and applications thereof
    5.
    发明授权
    Tessellation engine and applications thereof 有权
    细分引擎及其应用

    公开(公告)号:US08884957B2

    公开(公告)日:2014-11-11

    申请号:US12708331

    申请日:2010-02-18

    IPC分类号: G06T15/30 G06T17/20

    CPC分类号: G06T17/20 G06T2200/28

    摘要: Disclosed herein methods, apparatuses, and systems for performing graphics processing. In this regard, a processing unit includes a tessellation module and a connectivity module. The tessellation module is configured to sequentially tessellate portions of a geometric shape to provide a series of tessellation points for the geometric shape. The connectivity module is configured to connect one or more groups of the tessellation points into one or more primitives in an order in which the series of tessellation points is provided.

    摘要翻译: 本文公开了用于执行图形处理的方法,装置和系统。 在这方面,处理单元包括细分模块和连接模块。 镶嵌模块被配置为顺序地细分几何形状的部分以提供用于几何形状的一系列镶嵌点。 连接模块被配置为以一系列镶嵌点被提供的顺序将一个或多个镶嵌点组组合成一个或多个图元。

    Data Processing Using On-Chip Memory In Multiple Processing Units
    6.
    发明申请
    Data Processing Using On-Chip Memory In Multiple Processing Units 审中-公开
    在多处理单元中使用片上存储器的数据处理

    公开(公告)号:US20120017062A1

    公开(公告)日:2012-01-19

    申请号:US13186038

    申请日:2011-07-19

    IPC分类号: G06F15/76 G06F9/06 G06F12/02

    摘要: Methods are disclosed for improving data processing performance in a processor using on-chip local memory in multiple processing units. According to an embodiment, a method of processing data elements in a processor using a plurality of processing units, includes: launching, in each of the processing units, a first wavefront having a first type of thread followed by a second wavefront having a second type of thread, where the first wavefront reads as input a portion of the data elements from an off-chip shared memory and generates a first output; writing the first output to an on-chip local memory of the respective processing unit; and writing to the on-chip local memory a second output generated by the second wavefront, where input to the second wavefront comprises a first plurality of data elements from the first output. Corresponding system and computer program product embodiments are also disclosed.

    摘要翻译: 公开了用于在多个处理单元中使用片上本地存储器来改善处理器中的数据处理性能的方法。 根据实施例,一种使用多个处理单元处理处理器中的数据元素的方法包括:在每个处理单元中发射具有第一类型线程的第一波前面,之后是具有第二类型的第二波阵面 的线程,其中第一波前从片外共享存储器读取数据元素的一部分作为输入,并产生第一输出; 将第一输出写入相应处理单元的片上本地存储器; 以及向所述片上本地存储器写入由所述第二波前产生的第二输出,其中到所述第二波阵面的输入包括来自所述第一输出的第一多个数据元素。 还公开了相应的系统和计算机程序产品实施例。

    Work distribution for higher primitive rates
    8.
    发明授权
    Work distribution for higher primitive rates 有权
    工作分配更高的原始费率

    公开(公告)号:US08928679B2

    公开(公告)日:2015-01-06

    申请号:US13616474

    申请日:2012-09-14

    CPC分类号: G06T1/20 G06T1/60

    摘要: A system, method and a computer program product are provided for distributing prim groups for parallel processing in a single clock cycle. A work distributor divides a draw call for primitive processing into a plurality of prim groups according to a prim group size. The work distributor then distributes the plurality of prim groups to a plurality of shader engines for parallel processing of the plurality of prim groups during a clock cycle. The size of a prim group and a number of prim groups are scaled to the plurality of shader engines.

    摘要翻译: 提供了一种系统,方法和计算机程序产品,用于在单个时钟周期内分发用于并行处理的初级组。 工作分配器根据初始组大小将原始处理的绘制调用划分为多个初始组。 然后,工作分配器将多个初始组分配到多个着色引擎,用于在时钟周期期间对多个初始组进行并行处理。 原始组的大小和多个prim组的大小被缩放到多个着色器引擎。

    Work Distribution for Higher Primitive Rates
    9.
    发明申请
    Work Distribution for Higher Primitive Rates 有权
    较高原始利率的工作分配

    公开(公告)号:US20140078156A1

    公开(公告)日:2014-03-20

    申请号:US13616474

    申请日:2012-09-14

    IPC分类号: G06T1/20

    CPC分类号: G06T1/20 G06T1/60

    摘要: A system, method and a computer program product are provided for distributing prim groups for parallel processing in a single clock cycle. A work distributor divides a draw call for primitive processing into a plurality of prim groups according to a prim group size. The work distributor then distributes the plurality of prim groups to a plurality of shader engines for parallel processing of the plurality of prim groups during a clock cycle. The size of a prim group and a number of prim groups are scaled to the plurality of shader engines.

    摘要翻译: 提供了一种系统,方法和计算机程序产品,用于在单个时钟周期内分发用于并行处理的初级组。 工作分配器根据初始组大小将原始处理的绘制调用划分为多个初始组。 然后,工作分配器将多个初始组分配到多个着色引擎,用于在时钟周期期间并行处理多个初始组。 原始组的大小和多个prim组的大小被缩放到多个着色器引擎。