公开(公告)号：US20250006504A1

公开(公告)日：2025-01-02

申请号：US18343124

申请日：2023-06-28

Applicant: Tokyo Electron Limited

Inventor： Jason MARION ,  Indroneil ROY ,  Yusuke YOSHIDA ,  Yun HAN

IPC: H01L21/311 ,  H01L21/308 ,  H01L21/762

Abstract: A method includes providing a semiconductor substrate and forming a dielectric layer over the semiconductor substrate. The method includes forming a metal layer over the dielectric layer. The method includes forming a patterned mask over the metal layer. The method includes performing a first etching process using a first etchant to form metal patterns separated by trenches in the metal layer. The method further includes performing a second etching process using a second etchant and a passivant to extend the trenches in the dielectric layer, resulting in a passivation layer formed along sidewalls of the metal patterns.