Abstract:
A method for manufacturing a liquid crystal display including a pixel portion having a pixel TFT as well as a drive circuit portion having a N-type TFT and a P-type TFT is disclosed. Firstly, an un-doped silicon layer, an N-type silicon layer and a metal layer are sequentially formed over a substrate; then, the metal layer and the N-type silicon layer are patterned to define source and drain electrodes for the N-type TFT, source and drain electrodes for the pixel TFT and a bottom electrode of a storage capacitor; thereafter, a gate oxide layer and a gate metal layer are sequentially formed on the overall surface; subsequently, the gate metal layer and the gate oxide layer are patterned to form a gate electrode for the N-type TFT, a gate electrode for the P-type TFT and a power electrode as well as a gate electrode for the pixel TFT and the storage capacitor; afterwards, a first photo resist pattern which bares a predetermined region for the P-type TFT is formed on the surface over the substrate, and then p-type impurities are implanted to form source and drain electrodes for the P-type TFT; subsequently, after the first photo resist pattern is removed, an annealing treatment is carried out to activate the impurities; and finally, a passivation layer of photosensitive resin is formed and patterned to form contact holes; an ITO layer is then formed and patterned to form connections of the N-type TFT, the P-type TFT, the pixel TFT and the storage capacitor.
Abstract:
A method of forming a liquid crystal display device with a pixel TFT, a bottom electrode of pixel capacitor CL, and a storage capacitor Cs in a pixel region, and an n-type TFT and a p-type TFT in a driving circuit region is disclosed. Firstly, a transparent conductive oxide layer, a metal layer and an n-type heavy doped silicon layer are sequentially formed on a glass substrate. Thereafter, a patterning step is performed to define some predefined regions for above devices. After an active layer and a gate oxide layer are formed in order on all patterned surfaces, another patterning step is done to form a first, a second, and a third preserved region, respectively, for a LDD region of the n type TFT, source/drain regions for the p type TFT and a LDD region for pixel TFT and Cs. Afterward, gate electrodes are formed for aforementioned TFT and an upper electrode for Cs. Subsequently, a blanket nLDD implant is performed. Thereafter, a p type source/drain implant is carried out using a photoresist pattern as a mask. After removing the photoresist pattern, a passivation layer is formed on all areas. Next an annealing is performed to active the implant impurities. Another patterning process is then performed to form contact by patterning the passivation layer and form the bottom electrode of CL by further patterning the n-type heavy doped silicon layer, and the metal layer.
Abstract:
A method of forming a liquid crystal display device with a pixel TFT, a bottom electrode of pixel capacitor CL, and a storage capacitor Cs in a pixel region, and an n-type TFT and a p-type TFT in a driving circuit region is disclosed. Firstly, a metal layer and an n-type silicon layer are formed on a transparent substrate. Thereafter, a patterning step is performed to define some predefined regions for above devices. After an active layer and a gate oxide layer are formed in order on all patterned surfaces, another patterning step is done to form a first, a second, and a third preserved region, respectively, for a LDD region of the n type TFT, source/drain regions for the p type TFT and a LDD region for pixel TFT and Cs. Thereafter, a photosensitive layer is deposited and patterned to form a reflective bumps region. A metal layer is formed and patterned to form a cover over the reflective bumps region and gate electrodes for aforementioned TFT as well as an upper electrode for Cs. Subsequently, a blanket nLDD implant is performed. Thereafter, a p type source/drain implant is carried out using a photoresist pattern as a mask. After removing the photoresist pattern, a passivation layer is formed on all areas. Next an annealing is performed to active the implant impurities. Another patterning process is then performed to expose the metal reflective layer over the bumps region and to form contact by patterning the passivation layer.
Abstract:
A scan line is used to control two thin film transistors and a video data line is used to transmit video signal to pixel capacitors and maintenance capacitors. When the thin film transistors are selected by the selection signal, the video signal stored therein charges the pixel capacitors and maintenance capacitors. When the selection signal is removed, the charge in the pixel capacitors is preserved until the next repetition when that scan line is again selected by a selection signal and new voltages are stored therein. Thus a picture is displayed on the matrix display by the charges stored in the pixel capacitors.