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    Process for production of soybean protein material
    2.
    发明授权
    Process for production of soybean protein material 失效
    大豆蛋白原料生产工艺

    公开(公告)号：US5811150A

    公开(公告)日：1998-09-22

    申请号：US685798

    申请日：1996-07-24

    申请人： Seiji Morikawa ,  Toshiaki Saito ,  Motohiko Hirotsuka

    发明人： Seiji Morikawa ,  Toshiaki Saito ,  Motohiko Hirotsuka

    IPC分类号： A23J3/16 ,  A23J3/24 ,  A23L1/20

    CPC分类号： A23J3/24 ,  A23J3/16

    摘要： A process for producing a soybean protein material involves heating a soybean protein solution in the presence of an alkaline earth metal and then slowly freezing the solution. The soybean protein material formed by the method has a structure in which the layers are oriented along the non-cell ice crystals. The soybean protein material produced by the method has a very smooth mouthfeel in its raw condition but has a mouthfeel similar to that of meat when heated.

    摘要翻译： 制备大豆蛋白材料的方法包括在碱土金属的存在下加热大豆蛋白溶液，然后缓慢冷冻溶液。 通过该方法形成的大豆蛋白质材料具有这样的结构，其中层沿着非细胞冰晶取向。 通过该方法生产的大豆蛋白质材料在其原始状态下具有非常光滑的口感，但在加热时具有类似于肉的口感。

    ISDN terminal
    3.
    发明授权
    ISDN terminal 失效
    ISDN终端

    公开(公告)号：US5581609A

    公开(公告)日：1996-12-03

    申请号：US283145

    申请日：1994-08-01

    申请人： Toshiaki Saito

    发明人： Toshiaki Saito

    IPC分类号： H04M11/00 ,  H04N1/32 ,  H04Q11/04

    CPC分类号： H04Q11/0471

    摘要： A transferring method from an ISDN telephone to an ISDN data terminal comprises the steps of: transmitting a message to request a temporary interruption of a call to the ISDN from the call received ISDN telephone; transmitting a message to request a start of the interruption call to the ISDN from the ISDN data terminal connected to the same bus, as that of the ISDN telephone; and executing a data communication such as a G3 facsimile communication by the ISDN data terminal.

    摘要翻译： 从ISDN电话到ISDN数据终端的传送方法包括以下步骤：从呼叫接收的ISDN电话发送消息以请求暂时中断对ISDN的呼叫; 从与ISDN电话相同的总线的ISDN数据终端发送消息以请求开始对ISDN的中断呼叫; 并执行诸如由ISDN数据终端进行的G3传真通信的数据通信。

    Output buffer circuit having low breakdown voltage
    10.
    发明授权
    Output buffer circuit having low breakdown voltage 失效
    输出缓冲电路具有低击穿电压

    公开(公告)号：US6064227A

    公开(公告)日：2000-05-16

    申请号：US059248

    申请日：1998-04-14

    申请人： Toshiaki Saito

    发明人： Toshiaki Saito

    IPC分类号： H03K19/0185 ,  H03K19/003 ,  H03K19/0175 ,  H03K19/094 ,  H03K19/00 ,  H03K19/20 ,  G05K3/02

    CPC分类号： H03K19/00315

    摘要： In an output buffer circuit, a logic circuit generates first and second data signals each having a voltage level between a low voltage and a first high voltage. A level shift circuit receives the first data signal and generates a third data signal having a voltage between a first intermediate voltage and a second high voltage higher than the first high voltage. An output circuit includes first and second P-channel MOS transistors and first and second N-channel MOS transistors powered by the low voltage and the second high voltage, a gate of the first P-channel MOS transistor receives the third data signal, a gate of the second P-channel MOS transistor receives a second intermediate voltage between the low voltage and the second high voltage, a gate of the first N-channel MOS transistor receives the data signal, and a gate of the second N-channel MOS transistor receives a third intermediate voltage.

    摘要翻译： 在输出缓冲器电路中，逻辑电路产生每个具有低电压和第一高电压之间的电压电平的第一和第二数据信号。 电平移位电路接收第一数据信号并产生具有高于第一高电压的第一中间电压和第二高电压之间的电压的第三数据信号。 输出电路包括第一和第二P沟道MOS晶体管以及由低电压和第二高电压供电的第一和第二N沟道MOS晶体管，第一P沟道MOS晶体管的栅极接收第三数据信号，栅极 所述第二P沟道MOS晶体管接收所述低电压和所述第二高电压之间的第二中间电压，所述第一N沟道MOS晶体管的栅极接收所述数据信号，并且所述第二N沟道MOS晶体管的栅极接收 第三中间电压。