公开(公告)号：US10217676B2

公开(公告)日：2019-02-26

申请号：US15233914

申请日：2016-08-10

申请人： Toshiba Memory Corporation

发明人： Shinya Fukayama ,  Naoyuki Komuta ,  Hiroshi Watabe

IPC分类号： H01L25/00 ,  H01L21/66 ,  H01L23/00

摘要： A method for manufacturing a semiconductor device including a plurality of semiconductor chips includes steps of placing, on a first semiconductor chip, a second semiconductor chip, such that a plurality of bumps is located between the first semiconductor chip and the second semiconductor chip, determining a distance between the first semiconductor chip and the second semiconductor chip, and determining whether or not the distance is within a predetermined range and stopping placement of additional chips if the distance is determined to be outside the predetermined range.