公开(公告)号：US09935232B2

公开(公告)日：2018-04-03

申请号：US14932470

申请日：2015-11-04

Applicant: Toshiba Memory Corporation

Inventor： Gen Toyota ,  Shouta Inoue ,  Susumu Yamamoto ,  Takamasa Tanaka ,  Takamitsu Yoshida ,  Kazumasa Tanida

IPC: H01L31/18 ,  H01L21/304 ,  H01L21/683

CPC classification number: H01L31/18 ,  H01L21/304 ,  H01L21/6835 ,  H01L27/1464 ,  H01L27/14687 ,  H01L2221/68327 ,  H01L2221/6834

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes a step of grinding to thin a first semiconductor wafer on which a semiconductor device is formed in a state in which a surface of a second semiconductor wafer is fixed on a chuck table of a grinding device after bonding the first semiconductor wafer to the second semiconductor wafer. The method includes a step of fixing a surface of the first semiconductor wafer on the chuck table and grinding the surface of the second semiconductor wafer in a state in which the first semiconductor wafer is bonded to the second semiconductor wafer prior to the grinding step to thin the first semiconductor wafer.