公开(公告)号：US20140175514A1

公开(公告)日：2014-06-26

申请号：US13724598

申请日：2012-12-21

Applicant: U.S. ARMY RESEARCH LABORATORY ATTN: RDRL-LOC-I

Inventor： Ali Darwish ,  Hingloi Alfred Hung

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L29/42316 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/41758 ,  H01L29/7786 ,  H01L29/812

Abstract: A ring-shaped transistor includes a set of gates. Each gate of the set is disposed between a corresponding source and a corresponding drain. The set of gates are arranged such that all of the set of gates cannot be aligned with fewer than three imaginary straight lines drawn through the gates, with one of the imaginary straight lines passing only once though each of the set of gates.

Abstract translation: 环形晶体管包括一组门。 该组的每个栅极设置在相应的源极和相应的漏极之间。 所述一组栅极被布置成使得所述一组栅极不能与通过栅极绘制的少于三条假想直线对准，其中一条假想直线仅通过该组栅极中的每一条。