公开(公告)号：US20220413800A1

公开(公告)日：2022-12-29

申请号：US17672650

申请日：2022-02-15

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kyung Rok Kim ,  Jae Won Jeong ,  Youngeun Choi ,  Wooseok Kim ,  Myoung Kim

IPC: G06F7/523 ,  G11C15/04 ,  G06F7/50

Abstract: Provided is a memory device for a logic-in-memory. The memory cell includes: a ternary memory cell for storing ternary data: and a weight cell for controlling a current flowing in an operation line on the basis of a weight signal transmitted from the ternary memory cell and an activation signal transmitted via an activation line, wherein the weight cell includes a first transistor for receiving an input of weight data from a first node corresponding to a stored value of the ternary memory cell, a second transistor for receiving an input of inversed weight data from a second node corresponding to an inversed stored value of the ternary memory cell, and a third transistor for receiving an input of an activation signal transmitted via the activation line.