公开(公告)号：US10134744B1

公开(公告)日：2018-11-20

申请号：US15681444

申请日：2017-08-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Han Chen ,  Wei-Chi Chen ,  Ching Chang ,  Ming-Shing Chen ,  Chao-Hsien Wu ,  Chia-Hui Hwang ,  Lu-Ran Huang

IPC: G11C11/404 ,  H01L27/11 ,  H01L27/12 ,  G11C11/4097 ,  G11C11/417

Abstract: A semiconductor memory device includes a first inverter, a second inverter, a first and second inner access transistors, and a first and second outer access transistors. The first inverter includes a first pull-up transistor and a first pull-down transistor, the second inverter includes a second pull-up transistor (PL2) and a second pull-down transistor, and the first inverter and the second inverter forms a latch circuit. The first and second inner access transistors and the first and second outer access transistors are electrically connected to the latch circuit, and channel widths of the second inner access transistor and the second outer access transistor are different from each other.

公开(公告)号：US20150103585A1

公开(公告)日：2015-04-16

申请号：US14051471

申请日：2013-10-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Young-Ran Chuang ,  Chao-Hsien Wu ,  Ming-Shing Chen

IPC: G11C11/412

CPC classification number: G11C11/412 ,  G11C7/04

Abstract: A Static Random Access Memory (SRAM) cell is a latch circuit formed with two inverters each formed with a PMOS transistor and an NMOS transistor. The latch circuit is coupled to a capacitor through a switch. When the switch is switched on, the stability of data stored in the SRAM cell will be enhanced. When the switch is switched off, data can be written to the SRAM cell quickly.

Abstract translation: 静态随机存取存储器（SRAM）单元是形成有两个反相器的锁存电路，每个反相器都形成有PMOS晶体管和NMOS晶体管。 锁存电路通过开关耦合到电容器。 当开关打开时，SRAM单元中存储的数据的稳定性将得到提高。 当开关关闭时，数据可以快速写入SRAM单元。