公开(公告)号：US20230261092A1

公开(公告)日：2023-08-17

申请号：US17694694

申请日：2022-03-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wei-Hsuan Chang ,  Hao-Ping Yan ,  Ming-Hua Tsai ,  Chin-Chia Kuo

IPC: H01L29/66 ,  H01L21/266 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/6659 ,  H01L21/266 ,  H01L29/7833 ,  H01L29/0607

Abstract: A fabricating method of a middle voltage transistor includes providing a substrate. A gate predetermined region is defined on the substrate. Next, a mask layer is formed to cover only part of the gate predetermined region. Then, a first ion implantation process is performed to implant dopants into the substrate at two sides of the mask layer to form two first lightly doping regions. After removing the mask layer, a gate is formed to overlap the entirety gate predetermined region. Subsequently, two second lightly doping regions respectively formed within one of the first lightly doping regions. Next, two source/drain doping regions are respectively formed within one of the second lightly doping regions. Finally, two silicide layers are formed to respectively cover one of the source/drain doping regions.