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1.
公开(公告)号:US20180204838A1
公开(公告)日:2018-07-19
申请号:US15427512
申请日:2017-02-08
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L27/092 , H01L21/762 , H01L21/8234 , H01L21/8238 , H01L21/304
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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2.
公开(公告)号:US11417654B2
公开(公告)日:2022-08-16
申请号:US16995941
申请日:2020-08-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L27/146 , H01L27/14 , H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761 , H01L21/8234 , H01L29/78
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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3.
公开(公告)号:US11916075B2
公开(公告)日:2024-02-27
申请号:US17741123
申请日:2022-05-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L29/423 , H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761 , H01L21/8234 , H01L29/78
CPC classification number: H01L27/0922 , H01L21/761 , H01L21/76224 , H01L21/823878 , H01L21/823481 , H01L21/823892 , H01L29/7813
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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4.
公开(公告)号:US10529715B2
公开(公告)日:2020-01-07
申请号:US15427512
申请日:2017-02-08
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L21/304 , H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761 , H01L21/8234 , H01L29/78
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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5.
公开(公告)号:US20220271035A1
公开(公告)日:2022-08-25
申请号:US17741123
申请日:2022-05-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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6.
公开(公告)号:US20200098755A1
公开(公告)日:2020-03-26
申请号:US16697800
申请日:2019-11-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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公开(公告)号:US12061669B2
公开(公告)日:2024-08-13
申请号:US17343798
申请日:2021-06-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ching-Pei Lin , Ming-Tsung Yeh , Chuan-Guei Wang , Ji-Fu Kung
IPC: G06F18/2134 , G06F18/2137 , G06N5/04 , G06V20/62
CPC classification number: G06F18/21345 , G06F18/2137 , G06N5/04 , G06V20/635
Abstract: A manufacturing data analyzing method and a manufacturing data analyzing device are provided. The manufacturing data analyzing method includes the following steps. Each of at least one numerical data, at least one image data and at least one text data is transformed into a vector. The vectors are gathered to obtain a combined vector. The combined vector is inputted into an inference model to obtain a defect cause and a modify suggestion.
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8.
公开(公告)号:US20200381431A1
公开(公告)日:2020-12-03
申请号:US16995941
申请日:2020-08-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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9.
公开(公告)号:US10784261B2
公开(公告)日:2020-09-22
申请号:US16697800
申请日:2019-11-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Wei-Lun Hsu , Yung-Chien Kung , Ming-Tsung Yeh , Yan-Hsiu Liu , Am-Tay Luy , Yao-Pi Hsu , Ji-Fu Kung
IPC: H01L27/14 , H01L27/146 , H01L27/092 , H01L21/762 , H01L21/8238 , H01L21/761 , H01L21/8234 , H01L29/78
Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.
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