公开(公告)号：US20250056781A1

公开(公告)日：2025-02-13

申请号：US18367471

申请日：2023-09-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Lin Chen ,  Tsung-Hsun Wu ,  Liang-Wei Chiu ,  Yao-Chin Cheng

IPC: H10B10/00

Abstract: A layout pattern of static random-access memory (SRAM) includes a substrate, a plurality of diffusion regions and a plurality of gate structures are located on the substrate, each diffusion region includes a first diffusion region, a second diffusion region, a third diffusion region, a fourth diffusion region, a fifth diffusion region, a sixth diffusion region, a seventh diffusion region and an eighth diffusion region, and each gate structure spans the plurality of diffusion regions. The plurality of gate structures include a first gate structure, the first gate structure includes a first L-shaped portion, which spans the first diffusion region and the fifth diffusion region and forms a first pull-down transistor (PD1), the first diffusion region is adjacent to and in direct contact with the fifth diffusion region.

公开(公告)号：US10541244B1

公开(公告)日：2020-01-21

申请号：US16121609

申请日：2018-09-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Lin Chen ,  Tsung-Hsun Wu

IPC: G11C11/00 ,  H01L27/11 ,  G11C11/413 ,  H01L27/02 ,  G11C11/412 ,  H01L27/12

Abstract: The present invention provides a layout pattern of a static random access memory (SRAM), comprising at least two inverters coupled to each other for storing data, each inverter comprising an L-shaped gate structure on a substrate, the L-shaped gate structure includes a first portion arranged along a first direction and a second portion aligned along a second direction, wherein the first portion crosses a first diffusion region to form a pull-up device, and the first portion crosses a second diffusion region and a third diffusion region to form a pull-down device, and each of the inverters includes a local interconnection layer, crossing the second diffusion region and the third diffusion region.

公开(公告)号：US10971502B2

公开(公告)日：2021-04-06

申请号：US16297722

申请日：2019-03-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Hui Huang ,  Tsung-Hsun Wu ,  Po-Lin Chen

IPC: H01L27/11 ,  H01L23/528 ,  G11C11/412

Abstract: An SRAM structure includes a substrate. A first active region, a second active region, a third active region and a fourth active region are disposed on the substrate. A first gate structure includes a first part, a second part and a third part disposed on the substrate. The first part and the third part are perpendicular to the first active region. The second part is parallel to the first active region. The first part covers the first active region, the second active region and the fourth active region. The third part covers the fourth active region. The second part is disposed on an insulating region between the second active region and the fourth active region, and the second part contacts the first part and the third part.

公开(公告)号：US20200258891A1

公开(公告)日：2020-08-13

申请号：US16297722

申请日：2019-03-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Hui Huang ,  Tsung-Hsun Wu ,  Po-Lin Chen

IPC: H01L27/11 ,  H01L23/528 ,  G11C11/412

Abstract: An SRAM structure includes a substrate. A first active region, a second active region, a third active region and a fourth active region are disposed on the substrate. A first gate structure includes a first part, a second part and a third part disposed on the substrate. The first part and the third part are perpendicular to the first active region. The second part is parallel to the first active region. The first part covers the first active region, the second active region and the fourth active region. The third part covers the fourth active region. The second part is disposed on an insulating region between the second active region and the fourth active region, and the second part contacts the first part and the third part.