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公开(公告)号:US20210296286A1
公开(公告)日:2021-09-23
申请号:US16848848
申请日:2020-04-15
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Yu Shen , Tsung-Hsun Wu , Liang-Wei Chiu , Shih-Hao Liang
IPC: H01L25/065 , H01L23/00 , H01L23/535 , H01L21/8234 , H01L25/00
Abstract: A semiconductor device includes a first metal-oxide semiconductor (MOS) transistor on a first substrate, a first interlayer dielectric (ILD) layer on the first MOS transistor, a second substrate on the first ILD layer, and a second MOS transistor on a second substrate. Preferably, the semiconductor device includes a static random access memory (SRAM) and the SRAM includes a first pull-up device, a second pull-up device, a first pull-down device, a second pull-down device, a first pass-gate device, a second pass-gate device, a read port pull-down device, and a read port pass-gate device, in which the read port pull-down device includes the first MOS transistor and the read port pass-gate device includes the second MOS transistor.
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公开(公告)号:US20250056781A1
公开(公告)日:2025-02-13
申请号:US18367471
申请日:2023-09-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Po-Lin Chen , Tsung-Hsun Wu , Liang-Wei Chiu , Yao-Chin Cheng
IPC: H10B10/00
Abstract: A layout pattern of static random-access memory (SRAM) includes a substrate, a plurality of diffusion regions and a plurality of gate structures are located on the substrate, each diffusion region includes a first diffusion region, a second diffusion region, a third diffusion region, a fourth diffusion region, a fifth diffusion region, a sixth diffusion region, a seventh diffusion region and an eighth diffusion region, and each gate structure spans the plurality of diffusion regions. The plurality of gate structures include a first gate structure, the first gate structure includes a first L-shaped portion, which spans the first diffusion region and the fifth diffusion region and forms a first pull-down transistor (PD1), the first diffusion region is adjacent to and in direct contact with the fifth diffusion region.
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公开(公告)号:US11552052B2
公开(公告)日:2023-01-10
申请号:US16848848
申请日:2020-04-15
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Yu Shen , Tsung-Hsun Wu , Liang-Wei Chiu , Shih-Hao Liang
IPC: H01L25/065 , H01L23/00 , H01L23/535 , H01L21/8234 , H01L25/00
Abstract: A semiconductor device includes a first metal-oxide semiconductor (MOS) transistor on a first substrate, a first interlayer dielectric (ILD) layer on the first MOS transistor, a second substrate on the first ILD layer, and a second MOS transistor on a second substrate. Preferably, the semiconductor device includes a static random access memory (SRAM) and the SRAM includes a first pull-up device, a second pull-up device, a first pull-down device, a second pull-down device, a first pass-gate device, a second pass-gate device, a read port pull-down device, and a read port pass-gate device, in which the read port pull-down device includes the first MOS transistor and the read port pass-gate device includes the second MOS transistor.
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公开(公告)号:US11322215B1
公开(公告)日:2022-05-03
申请号:US17326375
申请日:2021-05-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Pin Tsao , Tsung-Hsun Wu , Liang-Wei Chiu , Kuo-Hsing Lee , Sheng-Yuan Hsueh , Kun-Hsien Lee , Chang-Chien Wong
Abstract: A one-time programmable (OTP) memory device includes a first memory cell, which further includes a first source line extending along a first direction on a substrate, a first word line extending along the first direction on one side of the first source line, a second word line extending along the first direction on another side of the first source line, a first diffusion region extending along a second direction adjacent to two sides of the first word line and the second word line, and a first metal interconnection connecting the first word line and the second word line.
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