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公开(公告)号:US20230402288A1
公开(公告)日:2023-12-14
申请号:US17857158
申请日:2022-07-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yeh-Sheng Lin , Chang-Mao Wang , Chun-Chi Yu , Chung-Yi Chiu
IPC: H01L21/311 , H01L21/768
CPC classification number: H01L21/31111 , H01L21/76802 , H01L21/31144
Abstract: A method of removing a step height on a gate structure includes providing a substrate. A gate structure is disposed on the substrate. A dielectric layer covers the gate structure and the substrate. Then, a composite material layer is formed to cover the dielectric layer. Later, part of the composite material layer is removed to form a step height disposed directly on the gate structure. Subsequently, a wet etching is performed to remove the step height. After the step height is removed, the dielectric layer is etched to form a first contact hole to expose the gate structure.
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公开(公告)号:US12211699B2
公开(公告)日:2025-01-28
申请号:US17857158
申请日:2022-07-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yeh-Sheng Lin , Chang-Mao Wang , Chun-Chi Yu , Chung-Yi Chiu
IPC: H01L21/311 , H01L21/768
Abstract: A method of removing a step height on a gate structure includes providing a substrate. A gate structure is disposed on the substrate. A dielectric layer covers the gate structure and the substrate. Then, a composite material layer is formed to cover the dielectric layer. Later, part of the composite material layer is removed to form a step height disposed directly on the gate structure. Subsequently, a wet etching is performed to remove the step height. After the step height is removed, the dielectric layer is etched to form a first contact hole to expose the gate structure.
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