公开(公告)号：US20210134679A1

公开(公告)日：2021-05-06

申请号：US16667921

申请日：2019-10-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Cheng Yang ,  Yi-Han Su ,  Sheng-Chen Chung ,  Chen-An Kuo ,  Chun-Lin Chen ,  Chiu-Te Lee ,  Chih-Chung Wang

IPC: H01L21/8234 ,  H01L21/8249

Abstract: A gate oxide forming process includes the following steps. A substrate including a first area and a second area is provided. A first oxide layer, a silicon containing cap layer and a second oxide layer on the substrate of the first area and the second area are sequentially and blanketly formed. The silicon containing cap layer and the second oxide layer in the first area are removed. An oxidation process is performed to oxidize the silicon containing cap layer and a gate oxide layer is formed in the second area.

公开(公告)号：US10985071B1

公开(公告)日：2021-04-20

申请号：US16667921

申请日：2019-10-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Cheng Yang ,  Yi-Han Su ,  Sheng-Chen Chung ,  Chen-An Kuo ,  Chun-Lin Chen ,  Chiu-Te Lee ,  Chih-Chung Wang

IPC: H01L21/8234 ,  H01L21/8249 ,  H01L21/8238 ,  H01L21/28

Abstract: A gate oxide forming process includes the following steps. A substrate including a first area and a second area is provided. A first oxide layer, a silicon containing cap layer and a second oxide layer on the substrate of the first area and the second area are sequentially and blanketly formed. The silicon containing cap layer and the second oxide layer in the first area are removed. An oxidation process is performed to oxidize the silicon containing cap layer and a gate oxide layer is formed in the second area.