公开(公告)号：US10978442B2

公开(公告)日：2021-04-13

申请号：US16446599

申请日：2019-06-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ying-Wei Tseng ,  Chun Chiang ,  Ping-Chen Chang ,  Tien-Hao Tang

IPC: H01L27/02

Abstract: An electrostatic discharge (ESD) protection device and a method thereof are presented. A well is disposed in a substrate. A gate is disposed on the well. A source region and a drain region are located in the well and at two opposite sides of the gate respectively. A first doped region is located in the drain region, wherein the first doped region is electrically connected to the drain region. A second doped region is located in the source region, wherein the second doped region is electrically connected to the source region. A third doped region is located in the well and at a side of the drain region opposite to the gate. A fourth doped region is located in the well and at a side of the source region opposite to the gate, wherein the fourth doped region is electrically connected to the third doped region.

公开(公告)号：US10522530B2

公开(公告)日：2019-12-31

申请号：US15927107

申请日：2018-03-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun Chiang ,  Ying-Wei Tseng ,  Ping-Chen Chang ,  Tien-Hao Tang

IPC: H01L23/552 ,  H01L27/02 ,  H01L23/60 ,  G01R31/00 ,  G01R31/28 ,  H01L23/10

Abstract: An electrostatic discharge (ESD) shielding semiconductor device and an ESD testing method thereof, the ESD shielding semiconductor device includes an integrated circuit, a seal ring and a conductive layer. The integrated circuit is disposed on a die, and the integrated circuit has a first region and a second region. The seal ring is disposed on the die to surround the integrated circuit. The conductive layer at least covers the first region, and which is electrically connected to the seal ring.

公开(公告)号：US20200381415A1

公开(公告)日：2020-12-03

申请号：US16446599

申请日：2019-06-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ying-Wei Tseng ,  Chun Chiang ,  Ping-Chen Chang ,  Tien-Hao Tang

IPC: H01L27/02

Abstract: An electrostatic discharge (ESD) protection device and a method thereof are presented. A well is disposed in a substrate. A gate is disposed on the well. A source region and a drain region are located in the well and at two opposite sides of the gate respectively. A first doped region is located in the drain region, wherein the first doped region is electrically connected to the drain region. A second doped region is located in the source region, wherein the second doped region is electrically connected to the source region. A third doped region is located in the well and at a side of the drain region opposite to the gate. A fourth doped region is located in the well and at a side of the source region opposite to the gate, wherein the fourth doped region is electrically connected to the third doped region.

公开(公告)号：US20190273077A1

公开(公告)日：2019-09-05

申请号：US15927107

申请日：2018-03-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun Chiang ,  Ying-Wei Tseng ,  Ping-Chen Chang ,  Tien-Hao Tang

IPC: H01L27/02 ,  H01L23/60 ,  H01L23/10 ,  G01R31/28 ,  G01R31/00

Abstract: An electrostatic discharge (ESD) shielding semiconductor device and an ESD testing method thereof, the ESD shielding semiconductor device includes an integrated circuit, a seal ring and a conductive layer. The integrated circuit is disposed on a die, and the integrated circuit has a first region and a second region. The seal ring is disposed on the die to surround the integrated circuit. The conductive layer at least covers the first region, and which is electrically connected to the seal ring.