公开(公告)号：US11721697B2

公开(公告)日：2023-08-08

申请号：US17735114

申请日：2022-05-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang ,  Yu-Wen Hung

IPC: H01L27/092 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L27/092 ,  H01L29/0665 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/42356

Abstract: A manufacturing method of a semiconductor device is provided in an embodiment of the present invention. The manufacturing method includes the following steps. A transistor is formed on a substrate. The transistor includes a plurality of semiconductor sheets and two source/drain structures. The semiconductor sheets are stacked in a vertical direction and separated from one another. Each of the semiconductor sheets includes two first doped layers and a second doped layer disposed between the two first doped layers in the vertical direction. A conductivity type of the second doped layer is complementary to a conductivity type of each of the two first doped layers. The two source/drain structures are disposed at two opposite sides of each of the semiconductor sheets in a horizontal direction respectively, and the two source/drain structures are connected with the semiconductor sheets.

公开(公告)号：US20220271032A1

公开(公告)日：2022-08-25

申请号：US17735114

申请日：2022-05-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang ,  Yu-Wen Hung

IPC: H01L27/092 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/10

Abstract: A manufacturing method of a semiconductor device is provided in an embodiment of the present invention. The manufacturing method includes the following steps. A transistor is formed on a substrate. The transistor includes a plurality of semiconductor sheets and two source/drain structures. The semiconductor sheets are stacked in a vertical direction and separated from one another. Each of the semiconductor sheets includes two first doped layers and a second doped layer disposed between the two first doped layers in the vertical direction. A conductivity type of the second doped layer is complementary to a conductivity type of each of the two first doped layers. The two source/drain structures are disposed at two opposite sides of each of the semiconductor sheets in a horizontal direction respectively, and the two source/drain structures are connected with the semiconductor sheets.

公开(公告)号：US11355494B1

公开(公告)日：2022-06-07

申请号：US17163586

申请日：2021-02-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Yu Yang ,  Yu-Wen Hung

IPC: H01L27/092 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device includes a substrate and a first transistor disposed on the substrate. The first transistor includes first semiconductor sheets and two first source/drain structures. The first semiconductor sheets are stacked in a vertical direction and separated from one another. Each of the first semiconductor sheets includes two first doped layers and a second doped layer disposed between the two first doped layers in the vertical direction. A conductivity type of the second doped layer is complementary to a conductivity type of each of the first doped layers. The two first source/drain structures are disposed at two opposite sides of each of the first semiconductor sheets in a horizontal direction respectively, and the two first source/drain structures are connected with the first semiconductor sheets.