公开(公告)号：US09443741B1

公开(公告)日：2016-09-13

申请号：US14748257

申请日：2015-06-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Zhi-Jian Wang ,  Cheng-Chang Wu ,  Hsin-Yu Hsieh ,  Shui-Yen Lu

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/308

CPC classification number: H01L21/0271 ,  H01L21/31055 ,  H01L21/31058

Abstract: An etching method includes forming a high density structure and a low density structure on a substrate. A first material layer is formed to cover both structures. Part of the low density structure is exposed through the first material layer. A second material layer is formed to cover the first material layer. The second material layer is etched to remove the second material layer on the high density structure and part of the second material layer on the low density structure. The first material layer on the high density structure and the second material layer on the low density structure are simultaneously etched. The first material layer is etched to expose a first portion of the high density structure and a second portion of the low density structure. Finally, the first portion and the second portion are removed.

Abstract translation: 蚀刻方法包括在基板上形成高密度结构和低密度结构。 形成第一材料层以覆盖两个结构。 低密度结构的一部分通过第一材料层暴露。 形成第二材料层以覆盖第一材料层。 蚀刻第二材料层以去除高密度结构上的第二材料层和低密度结构上的第二材料层的一部分。 同时蚀刻高密度结构上的第一材料层和低密度结构上的第二材料层。 蚀刻第一材料层以暴露高密度结构的第一部分和低密度结构的第二部分。 最后，去除第一部分和第二部分。